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chipyard
chipyard PublicForked from ucb-bar/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
C
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rocket-chip-fpga-shells
rocket-chip-fpga-shells PublicForked from chipsalliance/rocket-chip-fpga-shells
Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards
Scala
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coremark-workload
coremark-workload PublicForked from ucb-bar/coremark-workload
FireMarshal workload for CoreMark EEMBC
Shell
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riscv-coremark
riscv-coremark PublicForked from riscv-boom/riscv-coremark
Setup scripts and files needed to compile CoreMark on RISC-V
C
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FireMarshal
FireMarshal PublicForked from firesim/FireMarshal
Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.
Python
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opensbi
opensbi PublicForked from riscv-software-src/opensbi
RISC-V Open Source Supervisor Binary Interface
C
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