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Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (llvm#…
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…119592)

This PR resolves llvm#118845. I aimed to mirror the implementation
`m_Shuffle()` in
[PatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/PatternMatch.h).

Updated
[SDPatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/CodeGen/SDPatternMatch.h)
- Added `struct m_Mask` to match masks (`ArrayRef<int>`)
- Added two `m_Shuffle` functions. One to match independently of mask,
and one to match considering mask.
- Added `struct SDShuffle_match` to match `ISD::VECTOR_SHUFFLE`
considering mask

Updated
[SDPatternMatchTest.cpp](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp)
- Added `matchVecShuffle` test, which tests the behavior of both
`m_Shuffle()` functions

- - -

I am not sure if my test coverage is complete. I am not sure how to test
a `false` match, simply test against a different instruction? [Other
tests
](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp#L175),
such as for `VSelect`, test against `Select`. I am not sure if there is
an analogous instruction to compare against for `VECTOR_SHUFFLE`. I
would appreciate some pointers in this area. In general, please
liberally critique this PR!

---------

Co-authored-by: Aidan <[email protected]>
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AidanGoldfarb and Aidan authored Jan 6, 2025
1 parent 9236751 commit f3bc8c3
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44 changes: 44 additions & 0 deletions llvm/include/llvm/CodeGen/SDPatternMatch.h
Original file line number Diff line number Diff line change
Expand Up @@ -547,6 +547,39 @@ struct BinaryOpc_match {
}
};

/// Matching while capturing mask
template <typename T0, typename T1, typename T2> struct SDShuffle_match {
T0 Op1;
T1 Op2;
T2 Mask;

SDShuffle_match(const T0 &Op1, const T1 &Op2, const T2 &Mask)
: Op1(Op1), Op2(Op2), Mask(Mask) {}

template <typename MatchContext>
bool match(const MatchContext &Ctx, SDValue N) {
if (auto *I = dyn_cast<ShuffleVectorSDNode>(N)) {
return Op1.match(Ctx, I->getOperand(0)) &&
Op2.match(Ctx, I->getOperand(1)) && Mask.match(I->getMask());
}
return false;
}
};
struct m_Mask {
ArrayRef<int> &MaskRef;
m_Mask(ArrayRef<int> &MaskRef) : MaskRef(MaskRef) {}
bool match(ArrayRef<int> Mask) {
MaskRef = Mask;
return true;
}
};

struct m_SpecificMask {
ArrayRef<int> MaskRef;
m_SpecificMask(ArrayRef<int> MaskRef) : MaskRef(MaskRef) {}
bool match(ArrayRef<int> Mask) { return MaskRef == Mask; }
};

template <typename LHS_P, typename RHS_P, typename Pred_t,
bool Commutable = false, bool ExcludeChain = false>
struct MaxMin_match {
Expand Down Expand Up @@ -797,6 +830,17 @@ inline BinaryOpc_match<LHS, RHS> m_FRem(const LHS &L, const RHS &R) {
return BinaryOpc_match<LHS, RHS>(ISD::FREM, L, R);
}

template <typename V1_t, typename V2_t>
inline BinaryOpc_match<V1_t, V2_t> m_Shuffle(const V1_t &v1, const V2_t &v2) {
return BinaryOpc_match<V1_t, V2_t>(ISD::VECTOR_SHUFFLE, v1, v2);
}

template <typename V1_t, typename V2_t, typename Mask_t>
inline SDShuffle_match<V1_t, V2_t, Mask_t>
m_Shuffle(const V1_t &v1, const V2_t &v2, const Mask_t &mask) {
return SDShuffle_match<V1_t, V2_t, Mask_t>(v1, v2, mask);
}

template <typename LHS, typename RHS>
inline BinaryOpc_match<LHS, RHS> m_ExtractElt(const LHS &Vec, const RHS &Idx) {
return BinaryOpc_match<LHS, RHS>(ISD::EXTRACT_VECTOR_ELT, Vec, Idx);
Expand Down
27 changes: 27 additions & 0 deletions llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -119,6 +119,33 @@ TEST_F(SelectionDAGPatternMatchTest, matchValueType) {
EXPECT_FALSE(sd_match(Op2, m_ScalableVectorVT()));
}

TEST_F(SelectionDAGPatternMatchTest, matchVecShuffle) {
SDLoc DL;
auto Int32VT = EVT::getIntegerVT(Context, 32);
auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
const std::array<int, 4> MaskData = {2, 0, 3, 1};
const std::array<int, 4> OtherMaskData = {1, 2, 3, 4};
ArrayRef<int> Mask;

SDValue V0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, VInt32VT);
SDValue V1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, VInt32VT);
SDValue VecShuffleWithMask =
DAG->getVectorShuffle(VInt32VT, DL, V0, V1, MaskData);

using namespace SDPatternMatch;
EXPECT_TRUE(sd_match(VecShuffleWithMask, m_Shuffle(m_Value(), m_Value())));
EXPECT_TRUE(sd_match(VecShuffleWithMask,
m_Shuffle(m_Value(), m_Value(), m_Mask(Mask))));
EXPECT_TRUE(
sd_match(VecShuffleWithMask,
m_Shuffle(m_Value(), m_Value(), m_SpecificMask(MaskData))));
EXPECT_FALSE(
sd_match(VecShuffleWithMask,
m_Shuffle(m_Value(), m_Value(), m_SpecificMask(OtherMaskData))));
EXPECT_TRUE(
std::equal(MaskData.begin(), MaskData.end(), Mask.begin(), Mask.end()));
}

TEST_F(SelectionDAGPatternMatchTest, matchTernaryOp) {
SDLoc DL;
auto Int32VT = EVT::getIntegerVT(Context, 32);
Expand Down

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