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Following the usual convention for CSR instructions, if the CSR instruction does not include write side effects (e.g., csrr t0, mnxti), then no state update on any CSR occurs.
But in the code:
if (rs1[4:0] != 0 && rs1 != x0) { // Side-effects should occur.
These conflict because "the usual convention for CSR instructions" is NOTrs1[4:0] != 0 && rs1 != x0, it's just rs1 != x0.
For example
li x1, 0
csrrw x2, xnxti, x1
is considered to have write side effects by the normal convention, but apparently not by the pseudocode above.
The text was updated successfully, but these errors were encountered:
hirooih
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Jan 5, 2025
Regarding the definition of xnxti CSR, several inconsistencies have been pointed out in riscv#395, riscv#415, riscv#433, and riscv#434.
This PR attempts to resolve them.
Signed-off-by: Hiroo HAYASHI <[email protected]>
In the text:
But in the code:
These conflict because "the usual convention for CSR instructions" is NOT
rs1[4:0] != 0 && rs1 != x0
, it's justrs1 != x0
.For example
is considered to have write side effects by the normal convention, but apparently not by the pseudocode above.
The text was updated successfully, but these errors were encountered: