Popular repositories Loading

1. Forvis_RISCV-ISA-Spec Forvis_RISCV-ISA-Spec Public

   Formal specification of RISC-V Instruction Set

   Haskell 97 19

2. Bluespec_BSV_Tutorial Bluespec_BSV_Tutorial Public

   Bluespec BSV HLHDL tutorial

   Bluespec 95 22

3. ICFP2020_Bluespec_Tutorial ICFP2020_Bluespec_Tutorial Public

   Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference

   HTML 67 11

4. Learn_Bluespec_and_RISCV_Design Learn_Bluespec_and_RISCV_Design Public

   Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)

   Verilog 54 7

5. RISCV_ISA_Spec_Tour RISCV_ISA_Spec_Tour Public

   Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)

   HTML 35 4

6. RISCV_Piccolo_v1 RISCV_Piccolo_v1 Public

   Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).

   Verilog 33 5