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Merge pull request #622 from nhpupu/i2c-clarification
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Clarify I2C transaction contract for NACK behavior
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Dirbaio authored Aug 5, 2024
2 parents 987dc68 + 64d8227 commit bbd5803
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Showing 2 changed files with 2 additions and 2 deletions.
2 changes: 1 addition & 1 deletion embedded-hal-async/src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
/// - Data from adjacent operations of the same type are sent after each other without an SP or SR.
/// - Between adjacent operations of a different type an SR and SAD+R/W is sent.
/// - After executing the last operation an SP is sent automatically.
/// - If the last operation is a `Read` the master does not send an acknowledge for the last byte.
/// - At the end of each read operation (before SP or SR), the master does not send an acknowledge for the last byte.
///
/// - `ST` = start condition
/// - `SAD+R/W` = slave address followed by bit 1 to indicate reading or 0 to indicate writing
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2 changes: 1 addition & 1 deletion embedded-hal/src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -392,7 +392,7 @@ pub trait I2c<A: AddressMode = SevenBitAddress>: ErrorType {
/// - Data from adjacent operations of the same type are sent after each other without an SP or SR.
/// - Between adjacent operations of a different type an SR and SAD+R/W is sent.
/// - After executing the last operation an SP is sent automatically.
/// - If the last operation is a `Read` the master does not send an acknowledge for the last byte.
/// - At the end of each read operation (before SP or SR), the master does not send an acknowledge for the last byte.
///
/// - `ST` = start condition
/// - `SAD+R/W` = slave address followed by bit 1 to indicate reading or 0 to indicate writing
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