README updated.

README.md

@@ -21,12 +21,12 @@ When minimizing latency a good design is not when there is nothing left to add,
 
 The main design principle these queues follow is _minimalism_, which results in such design choices as:
 
-* Bare minimum of atomic instructions.
-* Explicit contention/false-sharing avoidance.
-* Fixed size buffer.
+* Bare minimum of atomic instructions. Inlinable by default push and pop functions can hardly be any cheaper in terms of CPU instruction number / L1i cache pressure.
+* Explicit contention/false-sharing avoidance for queue and its elements.
+* Linear fixed size ring-buffer array. No heap memory allocations after a queue object has constructed. It doesn't get any more CPU L1d or TLB cache friendly than that. 
 * Value semantics. Meaning that the queues make a copy/move upon `push`/`pop`, no reference/pointer to elements in the queue can be obtained.
 
-The impact of each of these small design choices on their own is barely measurable, but their total impact is much greater than a simple sum of the constituents' impacts, aka super-scalar compounding or synergy (a layman's term). The synergy emerging from combining multiple of these small design choices together is what allows CPUs to perform at their peak capacities least impeded.
+The impact of each of these small design choices on their own is barely measurable, but their total impact is much greater than a simple sum of the constituents' impacts, aka super-scalar compounding or synergy. The synergy emerging from combining multiple of these small design choices together is what allows CPUs to perform at their peak capacities least impeded.
 
 These design choices are also limitations: