Review Request: Rough Implementation of LBR on Memtrace#8

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takhandipu wants to merge 111 commits intostanford-mast:memtracefrom takhandipu:memtrace

+940-55

Commits on Dec 24, 2019

clang zero latency icache consumes 85% less cycles
takhandipu
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LBR data is defined, but mechanism is not
takhandipu
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Implemented LBR
Tanvir Ahmed Khan
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Semantic bug fix
Tanvir Ahmed Khan
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Checking whether we can pass LBR pointer via MemReq
Tanvir Ahmed Khan
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LBR uses uint64_t instead of Address to ensure MemReq can use that
Tanvir Ahmed Khan
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remove bits/stdc++.h from lbr.h
Tanvir Ahmed Khan
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Trying to fix MemReq plain old data type error
Tanvir Ahmed Khan
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Commits on Dec 25, 2019

Trying to see whether ooo_filter_cache load can take lbr (by feault nullptr)
Tanvir Ahmed Khan
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Trying to see whether filter_cache load can take lbr (by feault nullptr)
Tanvir Ahmed Khan
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Trying to see whether filter_cache replace and cache_arrays lookup can take lbr (by feault nullptr)
Tanvir Ahmed Khan
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LBR logging for a cache_arrays miss is enabled
Tanvir Ahmed Khan
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Tiny syntactic bug fiz
Tanvir Ahmed Khan
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Enabling lbr logging for each L1i->load() misses
Tanvir Ahmed Khan
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Minor semantic bug fiz
Tanvir Ahmed Khan
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Minor implementation bug fix
Tanvir Ahmed Khan
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l1i->load for ooo_core now includes program counter so that we can log miss
Tanvir Ahmed Khan
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Wrong path L1i fetch does not include LBR or PC logging, Have to talk with Professor Litz regarding that
Tanvir Ahmed Khan
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LBR data for a given BBL is pushed even before calling ooo_core->bbl on it, again have to check with Professor Litz
Tanvir Ahmed Khan
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added missed cache line address when logging LBR, I guess LBR implementation is complete
Tanvir Ahmed Khan
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forgot to add lbr.h in the previous commit, I guess LBR implementation is complete
Tanvir Ahmed Khan
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Commits on Jan 10, 2020

Major bug fix regarding front-end cycle computation on prefetched instructions
takhandipu
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Commits on Jan 21, 2020

second latest one works best empirically, so we picked the second last replacement timestamp
takhandipu
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Commits on Jan 22, 2020

Added new bbl-info printing capability to log number of instructions in the bbl and the size of the bbl
takhandipu
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Commits on Jan 23, 2020

Commits on Jan 24, 2020

Added cfg flags to enable/disable first-pass profile data and prefetch having lower priority on replacement policy than demand-load
takhandipu
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Commits on Jan 28, 2020

Fixed bug in zeroLatencyCache implementation, ideal cache now has access latency
takhandipu
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Commits on Jan 30, 2020

Implemented the static code bloat fetch impact on the trace and the simulation
takhandipu
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Commits on Feb 10, 2020

Prefetch buffer implementation is complete but may not work for cRec conflict
takhandipu
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Commits on Feb 26, 2020

Commits on Feb 27, 2020

Commits on Mar 3, 2020

Adding a new counter profPrefLateSavedCycles
takhandipu
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Commits on Mar 20, 2020

Modified context-sensitive prefetch to support variable sized context
Tanvir Ahmed Khan
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context size up to 8
Tanvir Ahmed Khan
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Minor fix
Tanvir Ahmed Khan
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Commits on Mar 27, 2020

made isSW prefetch false to see the results of all different counters
Tanvir Ahmed Khan
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Commits on Mar 29, 2020

divided profPrefEarlyMiss counter into profPrefEarlyMiss and profPrefNeverUsed counters based on 400 cycle difference from req->cycle and candidate's startCycle
Tanvir Ahmed Khan
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Commits on Apr 1, 2020

Added a new entry at the end of the LBR string to map it on to the dcfg
Tanvir Ahmed Khan
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minor bug fix
Tanvir Ahmed Khan
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Commits on Apr 3, 2020

Changed context sensitive prefetch file description again
Tanvir Ahmed Khan
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minor bug fix context sensitive prefetch
Tanvir Ahmed Khan
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minor garbage collection
Tanvir Ahmed Khan
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Commits on Apr 9, 2020

AsmDB n-next line prefetching sim parameter is added to simulate the analysis
Tanvir Ahmed Khan
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AsmDB miss-based next line prefetching is implemented, let's see whether it runs or not
Tanvir Ahmed Khan
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Commits on Apr 13, 2020

Figuring out verilator next line anomaly
Tanvir Ahmed Khan
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Commits on Apr 14, 2020

Trying to combine context and coalesce in a better way
Tanvir Ahmed Khan
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Commits on Apr 18, 2020

Added the false positive rate parameter on the context sensitive prefetch
Tanvir Ahmed Khan
committed

Commits on Feb 11, 2021

Commits on Feb 18, 2021