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Merge pull request #498 from stm32-rs/clocks
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&Clocks instead of Clocks
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burrbull authored Oct 5, 2024
2 parents 8ac324d + f8eead5 commit f74efe5
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Showing 16 changed files with 46 additions and 37 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Replace UB code by a legitimate pointer access [#480]
- Fix flash error flag clearing [#489]
- Clarify README for windows users [#496]
- Take `&Clocks` instead of `Clocks`

### Added

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2 changes: 1 addition & 1 deletion Cargo.toml
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Expand Up @@ -56,7 +56,7 @@ panic-itm = "0.4.2"
cortex-m-rtic = "1.1.3"
cortex-m-semihosting = "0.5.0"
heapless = "0.7.16"
mfrc522 = "0.3.0"
mfrc522 = "0.5.0"
usb-device = "0.2.8"
usbd-serial = "0.1.1"

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2 changes: 1 addition & 1 deletion examples/adc-dma-circ.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ fn main() -> ! {
let dma_ch1 = p.DMA1.split().1;

// Setup ADC
let adc1 = adc::Adc::adc1(p.ADC1, clocks);
let adc1 = adc::Adc::adc1(p.ADC1, &clocks);

// Setup GPIOA
let mut gpioa = p.GPIOA.split();
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2 changes: 1 addition & 1 deletion examples/adc-dma-rx.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ fn main() -> ! {
let dma_ch1 = p.DMA1.split().1;

// Setup ADC
let adc1 = adc::Adc::adc1(p.ADC1, clocks);
let adc1 = adc::Adc::adc1(p.ADC1, &clocks);

// Setup GPIOA
let mut gpioa = p.GPIOA.split();
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4 changes: 2 additions & 2 deletions examples/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,10 +25,10 @@ fn main() -> ! {
hprintln!("adc freq: {}", clocks.adcclk());

// Setup ADC
let mut adc1 = adc::Adc::adc1(p.ADC1, clocks);
let mut adc1 = adc::Adc::adc1(p.ADC1, &clocks);

#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
let mut adc2 = adc::Adc::adc2(p.ADC2, clocks);
let mut adc2 = adc::Adc::adc2(p.ADC2, &clocks);

// Setup GPIOB
let mut gpiob = p.GPIOB.split();
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2 changes: 1 addition & 1 deletion examples/adc_temperature.rs
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ fn main() -> ! {
hprintln!("adc freq: {}", clocks.adcclk());

// Setup ADC
let mut adc = adc::Adc::adc1(p.ADC1, clocks);
let mut adc = adc::Adc::adc1(p.ADC1, &clocks);

// Read temperature sensor
loop {
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5 changes: 2 additions & 3 deletions examples/mfrc522.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@ use panic_itm as _;
use cortex_m::iprintln;

use cortex_m_rt::entry;
use embedded_hal_02::digital::v1_compat::OldOutputPin;
use embedded_hal_02::spi::{Mode, Phase, Polarity};
use mfrc522::Mfrc522;
use stm32f1xx_hal::{pac, prelude::*, spi::Spi};
Expand Down Expand Up @@ -39,11 +38,11 @@ fn main() -> ! {
&mut afio.mapr,
MODE,
1.MHz(),
clocks,
&clocks,
);

let nss = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);
let mut mfrc522 = Mfrc522::new(spi, OldOutputPin::from(nss)).unwrap();
let mut mfrc522 = Mfrc522::new(spi).with_nss(nss).init().unwrap();

let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
led.set_high();
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2 changes: 1 addition & 1 deletion examples/spi-dma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ fn main() -> ! {
polarity: Polarity::IdleLow,
phase: Phase::CaptureOnFirstTransition,
};
let spi = Spi::spi2(dp.SPI2, pins, spi_mode, 100.kHz(), clocks);
let spi = Spi::spi2(dp.SPI2, pins, spi_mode, 100.kHz(), &clocks);

// Set up the DMA device
let dma = dp.DMA1.split();
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2 changes: 1 addition & 1 deletion examples/spi-slave.rs
Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ fn main() -> ! {
&mut afio.mapr,
MODE,
10.kHz(),
clocks,
&clocks,
);

// SPI2
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2 changes: 1 addition & 1 deletion examples/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ fn setup() -> (
&mut afio.mapr,
MODE,
1.MHz(),
clocks,
&clocks,
);

(spi, cs)
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21 changes: 12 additions & 9 deletions src/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@

use core::marker::PhantomData;
use embedded_hal_02::adc::{Channel, OneShot};
use fugit::HertzU32 as Hertz;

#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
use crate::dma::dma2;
Expand All @@ -25,7 +26,8 @@ pub struct Adc<ADC> {
rb: ADC,
sample_time: SampleTime,
align: Align,
clocks: Clocks,
sysclk: Hertz,
adcclk: Hertz,
}

/// ADC sampling time
Expand Down Expand Up @@ -183,12 +185,13 @@ macro_rules! adc_hal {
///
/// Sets all configurable parameters to one-shot defaults,
/// performs a boot-time calibration.
pub fn $adc(adc: $ADC, clocks: Clocks) -> Self {
pub fn $adc(adc: $ADC, clocks: &Clocks) -> Self {
let mut s = Self {
rb: adc,
sample_time: SampleTime::default(),
align: Align::default(),
clocks,
sysclk: clocks.sysclk(),
adcclk: clocks.adcclk(),
};
s.enable_clock();
s.power_down();
Expand All @@ -199,9 +202,9 @@ macro_rules! adc_hal {
// The manual states that we need to wait two ADC clocks cycles after power-up
// before starting calibration, we already delayed in the power-up process, but
// if the adc clock is too low that was not enough.
if s.clocks.adcclk() < kHz(2500) {
let two_adc_cycles = s.clocks.sysclk() / s.clocks.adcclk() * 2;
let already_delayed = s.clocks.sysclk() / kHz(800);
if s.adcclk < kHz(2500) {
let two_adc_cycles = s.sysclk / s.adcclk * 2;
let already_delayed = s.sysclk / kHz(800);
if two_adc_cycles > already_delayed {
delay(two_adc_cycles - already_delayed);
}
Expand Down Expand Up @@ -263,7 +266,7 @@ macro_rules! adc_hal {
// this time can be found in the datasheets.
// Here we are delaying for approximately 1us, considering 1.25 instructions per
// cycle. Do we support a chip which needs more than 1us ?
delay(self.clocks.sysclk() / kHz(800));
delay(self.sysclk / kHz(800));
}

fn power_down(&mut self) {
Expand Down Expand Up @@ -463,7 +466,7 @@ impl Adc<pac::ADC1> {
// sensor, this time can be found in the datasheets.
// Here we are delaying for approximately 10us, considering 1.25 instructions per
// cycle. Do we support a chip which needs more than 10us ?
delay(self.clocks.sysclk().raw() / 80_000);
delay(self.sysclk.raw() / 80_000);
true
} else {
false
Expand Down Expand Up @@ -503,7 +506,7 @@ impl Adc<pac::ADC1> {
// recommended ADC sampling for temperature sensor is 17.1 usec,
// so use the following approximate settings
// to support all ADC frequencies
let sample_time = match self.clocks.adcclk().raw() {
let sample_time = match self.adcclk.raw() {
0..=1_200_000 => SampleTime::T_1,
1_200_001..=1_500_000 => SampleTime::T_7,
1_500_001..=2_400_000 => SampleTime::T_13,
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8 changes: 4 additions & 4 deletions src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -141,7 +141,7 @@ impl<PINS> I2c<I2C1, PINS> {
pins: PINS,
mapr: &mut MAPR,
mode: M,
clocks: Clocks,
clocks: &Clocks,
) -> Self
where
PINS: Pins<I2C1>,
Expand All @@ -153,7 +153,7 @@ impl<PINS> I2c<I2C1, PINS> {

impl<PINS> I2c<I2C2, PINS> {
/// Creates a generic I2C2 object on pins PB10 and PB11 using the embedded-hal `BlockingI2c` trait.
pub fn i2c2<M: Into<Mode>>(i2c: I2C2, pins: PINS, mode: M, clocks: Clocks) -> Self
pub fn i2c2<M: Into<Mode>>(i2c: I2C2, pins: PINS, mode: M, clocks: &Clocks) -> Self
where
PINS: Pins<I2C2>,
{
Expand All @@ -166,13 +166,13 @@ where
I2C: Instance,
{
/// Configures the I2C peripheral to work in master mode
fn configure<M: Into<Mode>>(i2c: I2C, pins: PINS, mode: M, clocks: Clocks) -> Self {
fn configure<M: Into<Mode>>(i2c: I2C, pins: PINS, mode: M, clocks: &Clocks) -> Self {
let mode = mode.into();
let rcc = unsafe { &(*RCC::ptr()) };
I2C::enable(rcc);
I2C::reset(rcc);

let pclk1 = I2C::clock(&clocks);
let pclk1 = I2C::clock(clocks);

assert!(mode.get_frequency() <= kHz(400));

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10 changes: 5 additions & 5 deletions src/i2c/blocking.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
pins: PINS,
mapr: &mut MAPR,
mode: M,
clocks: Clocks,
clocks: &Clocks,
start_timeout_us: u32,
start_retries: u8,
addr_timeout_us: u32,
Expand Down Expand Up @@ -55,7 +55,7 @@ impl<PINS> BlockingI2c<I2C2, PINS> {
i2c: I2C2,
pins: PINS,
mode: M,
clocks: Clocks,
clocks: &Clocks,
start_timeout_us: u32,
start_retries: u8,
addr_timeout_us: u32,
Expand Down Expand Up @@ -85,7 +85,7 @@ impl<I2C, PINS> I2c<I2C, PINS> {
start_retries: u8,
addr_timeout_us: u32,
data_timeout_us: u32,
clocks: Clocks,
clocks: &Clocks,
) -> BlockingI2c<I2C, PINS> {
let sysclk_mhz = clocks.sysclk().to_MHz();
BlockingI2c {
Expand All @@ -98,7 +98,7 @@ impl<I2C, PINS> I2c<I2C, PINS> {
},
}
}
pub fn blocking_default(self, clocks: Clocks) -> BlockingI2c<I2C, PINS> {
pub fn blocking_default(self, clocks: &Clocks) -> BlockingI2c<I2C, PINS> {
let sysclk_mhz = clocks.sysclk().to_MHz();
BlockingI2c {
nb: self,
Expand Down Expand Up @@ -169,7 +169,7 @@ impl<I2C: Instance, PINS> BlockingI2c<I2C, PINS> {
i2c: I2C,
pins: PINS,
mode: M,
clocks: Clocks,
clocks: &Clocks,
start_timeout_us: u32,
start_retries: u8,
addr_timeout_us: u32,
Expand Down
2 changes: 1 addition & 1 deletion src/rcc/enable.rs
Original file line number Diff line number Diff line change
Expand Up @@ -184,7 +184,7 @@ bus! {
TIM11 => (APB2, 21),
}

#[cfg(any(feature = "stm32f102", feature = "stm32f103"))]
#[cfg(any(feature = "stm32f103"))] // feature = "stm32f102"

Check warning on line 187 in src/rcc/enable.rs

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GitHub Actions / clippy

unneeded sub `cfg` when there is only one condition

warning: unneeded sub `cfg` when there is only one condition --> src/rcc/enable.rs:187:7 | 187 | #[cfg(any(feature = "stm32f103"))] // feature = "stm32f102" | ^^^^^^^^^^^^^^^^^^^^^^^^^^ help: try: `feature = "stm32f103"` | = help: for further information visit https://rust-lang.github.io/rust-clippy/master/index.html#non_minimal_cfg = note: `#[warn(clippy::non_minimal_cfg)]` on by default
bus! {
USB => (APB1, 23),
}
16 changes: 11 additions & 5 deletions src/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -222,7 +222,7 @@ impl<REMAP, PINS> Spi<pac::SPI1, REMAP, PINS, u8, Master> {
mapr: &mut MAPR,
mode: impl Into<Mode>,
freq: Hertz,
clocks: Clocks,
clocks: &Clocks,
) -> Self
where
REMAP: Remap<Periph = pac::SPI1>,
Expand Down Expand Up @@ -259,7 +259,7 @@ impl<REMAP, PINS> Spi<pac::SPI2, REMAP, PINS, u8, Master> {
You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins
*/
pub fn spi2(spi: pac::SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self
pub fn spi2(spi: pac::SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: &Clocks) -> Self
where
REMAP: Remap<Periph = pac::SPI2>,
PINS: Pins<REMAP>,
Expand Down Expand Up @@ -295,7 +295,7 @@ impl<REMAP, PINS> Spi<pac::SPI3, REMAP, PINS, u8, Master> {
You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins
*/
#[cfg(not(feature = "connectivity"))]
pub fn spi3(spi: pac::SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self
pub fn spi3(spi: pac::SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: &Clocks) -> Self
where
REMAP: Remap<Periph = pac::SPI3>,
PINS: Pins<REMAP>,
Expand All @@ -317,7 +317,7 @@ impl<REMAP, PINS> Spi<pac::SPI3, REMAP, PINS, u8, Master> {
mapr: &mut MAPR,
mode: Mode,
freq: Hertz,
clocks: Clocks,
clocks: &Clocks,
) -> Self
where
REMAP: Remap<Periph = pac::SPI3>,
Expand Down Expand Up @@ -484,7 +484,13 @@ impl<SPI, REMAP, PINS> Spi<SPI, REMAP, PINS, u8, Master>
where
SPI: Instance,
{
fn configure(spi: SPI, pins: PINS, mode: impl Into<Mode>, freq: Hertz, clocks: Clocks) -> Self {
fn configure(
spi: SPI,
pins: PINS,
mode: impl Into<Mode>,
freq: Hertz,
clocks: &Clocks,
) -> Self {
let mode = mode.into();
// enable or reset SPI
let rcc = unsafe { &(*RCC::ptr()) };
Expand Down
2 changes: 1 addition & 1 deletion src/time.rs
Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,7 @@ pub struct MonoTimer {

impl MonoTimer {
/// Creates a new `Monotonic` timer
pub fn new(mut dwt: DWT, mut dcb: DCB, clocks: Clocks) -> Self {
pub fn new(mut dwt: DWT, mut dcb: DCB, clocks: &Clocks) -> Self {
dcb.enable_trace();
dwt.enable_cycle_counter();

Expand Down

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