remap enums

CHANGELOG.md

@@ -7,14 +7,21 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Breaking changes
+
+- Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
+  Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
+  Remove `RemapStruct`s. [#462]
+- Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
+- Take `&Clocks` instead of `Clocks` [#498]
+
 ### Changed
 
 - PWM timer auto reload value is now preloaded/buffered [#453]
 - Move from bors/manual merge to GH merge queue [#467]
 - Replace UB code by a legitimate pointer access [#480]
 - Fix flash error flag clearing [#489]
 - Clarify README for windows users [#496]
-- Take `&Clocks` instead of `Clocks`
 
 ### Added
 
@@ -28,6 +35,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 [#416]: https://github.com/stm32-rs/stm32f1xx-hal/pull/416
 [#453]: https://github.com/stm32-rs/stm32f1xx-hal/pull/453
+[#462]: https://github.com/stm32-rs/stm32f1xx-hal/pull/462
 [#467]: https://github.com/stm32-rs/stm32f1xx-hal/pull/467
 [#479]: https://github.com/stm32-rs/stm32f1xx-hal/pull/479
 [#480]: https://github.com/stm32-rs/stm32f1xx-hal/pull/480
@@ -36,6 +44,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#489]: https://github.com/stm32-rs/stm32f1xx-hal/pull/489
 [#494]: https://github.com/stm32-rs/stm32f1xx-hal/pull/494
 [#496]: https://github.com/stm32-rs/stm32f1xx-hal/pull/496
+[#498]: https://github.com/stm32-rs/stm32f1xx-hal/pull/498
 
 ## [v0.10.0] - 2022-12-12
 

examples/can-echo.rs

@@ -10,7 +10,7 @@ use panic_halt as _;
 use bxcan::filter::Mask32;
 use cortex_m_rt::entry;
 use nb::block;
-use stm32f1xx_hal::{can::Can, pac, prelude::*};
+use stm32f1xx_hal::{gpio::Floating, pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -27,15 +27,15 @@ fn main() -> ! {
     let mut afio = dp.AFIO.constrain();
 
     let mut can1 = {
-        #[cfg(not(feature = "connectivity"))]
-        let can = Can::new(dp.CAN1, dp.USB);
-        #[cfg(feature = "connectivity")]
-        let can = Can::new(dp.CAN1);
+        let gpioa = dp.GPIOA.split();
+        let rx = gpioa.pa11;
+        let tx = gpioa.pa12;
 
-        let mut gpioa = dp.GPIOA.split();
-        let rx = gpioa.pa11.into_floating_input(&mut gpioa.crh);
-        let tx = gpioa.pa12.into_alternate_push_pull(&mut gpioa.crh);
-        can.assign_pins((tx, rx), &mut afio.mapr);
+        let can = dp.CAN1.can::<Floating>(
+            #[cfg(not(feature = "connectivity"))]
+            dp.USB,
+            (tx, rx, &mut afio.mapr),
+        );
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/
@@ -50,12 +50,10 @@ fn main() -> ! {
 
     #[cfg(feature = "connectivity")]
     let _can2 = {
-        let can = Can::new(dp.CAN2);
-
-        let mut gpiob = dp.GPIOB.split();
-        let rx = gpiob.pb5.into_floating_input(&mut gpiob.crl);
-        let tx = gpiob.pb6.into_alternate_push_pull(&mut gpiob.crl);
-        can.assign_pins((tx, rx), &mut afio.mapr);
+        let gpiob = dp.GPIOB.split();
+        let can = dp
+            .CAN2
+            .can::<Floating>((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

examples/can-loopback.rs

@@ -12,7 +12,7 @@ use panic_halt as _;
 
 use cortex_m_rt::entry;
 use nb::block;
-use stm32f1xx_hal::{can::Can, pac, prelude::*};
+use stm32f1xx_hal::{can::Can, gpio::Floating, pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -25,11 +25,11 @@ fn main() -> ! {
     // resonator must be used.
     rcc.cfgr.use_hse(8.MHz()).freeze(&mut flash.acr);
 
-    #[cfg(not(feature = "connectivity"))]
-    let can = Can::new(dp.CAN1, dp.USB);
-
-    #[cfg(feature = "connectivity")]
-    let can = Can::new(dp.CAN1);
+    let can = Can::<_, Floating>::new_loopback(
+        dp.CAN1,
+        #[cfg(not(feature = "connectivity"))]
+        dp.USB,
+    );
 
     // Use loopback mode: No pins need to be assigned to peripheral.
     // APB1 (PCLK1): 8MHz, Bit rate: 500Bit/s, Sample Point 87.5%

examples/can-rtic.rs

@@ -55,7 +55,7 @@ mod app {
     use super::{enqueue_frame, PriorityFrame};
     use bxcan::{filter::Mask32, ExtendedId, Fifo, Frame, Interrupts, Rx0, StandardId, Tx};
     use heapless::binary_heap::{BinaryHeap, Max};
-    use stm32f1xx_hal::{can::Can, pac::CAN1, prelude::*};
+    use stm32f1xx_hal::{can::Can, gpio::Floating, pac::CAN1, prelude::*};
 
     #[local]
     struct Local {
@@ -82,18 +82,21 @@ mod app {
             .pclk2(64.MHz())
             .freeze(&mut flash.acr);
 
+        // Select pins for CAN1.
+        let gpioa = cx.device.GPIOA.split();
+        let can_rx_pin = gpioa.pa11;
+        let can_tx_pin = gpioa.pa12;
+        let mut afio = cx.device.AFIO.constrain();
+
         #[cfg(not(feature = "connectivity"))]
-        let can = Can::new(cx.device.CAN1, cx.device.USB);
+        let can = Can::<_, Floating>::new(
+            cx.device.CAN1,
+            cx.device.USB,
+            (can_tx_pin, can_rx_pin, &mut afio.mapr),
+        );
 
         #[cfg(feature = "connectivity")]
-        let can = Can::new(cx.device.CAN1);
-
-        // Select pins for CAN1.
-        let mut gpioa = cx.device.GPIOA.split();
-        let can_rx_pin = gpioa.pa11.into_floating_input(&mut gpioa.crh);
-        let can_tx_pin = gpioa.pa12.into_alternate_push_pull(&mut gpioa.crh);
-        let mut afio = cx.device.AFIO.constrain();
-        can.assign_pins((can_tx_pin, can_rx_pin), &mut afio.mapr);
+        let can = Can::<_, Floating>::new(cx.device.CAN1, (can_tx_pin, can_rx_pin, &mut afio.mapr));
 
         // APB1 (PCLK1): 16MHz, Bit rate: 1000kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

examples/mfrc522.rs

@@ -7,9 +7,12 @@ use panic_itm as _;
 use cortex_m::iprintln;
 
 use cortex_m_rt::entry;
-use embedded_hal_02::spi::{Mode, Phase, Polarity};
 use mfrc522::Mfrc522;
-use stm32f1xx_hal::{pac, prelude::*, spi::Spi};
+use stm32f1xx_hal::{
+    pac,
+    prelude::*,
+    spi::{Mode, Phase, Polarity, Spi},
+};
 pub const MODE: Mode = Mode {
     polarity: Polarity::IdleLow,
     phase: Phase::CaptureOnFirstTransition,
@@ -32,10 +35,9 @@ fn main() -> ! {
     let sck = gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl);
     let miso = gpioa.pa6;
     let mosi = gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl);
-    let spi = Spi::spi1(
+    let spi = Spi::new(
         dp.SPI1,
-        (sck, miso, mosi),
-        &mut afio.mapr,
+        (sck, miso, mosi, &mut afio.mapr),
         MODE,
         1.MHz(),
         &clocks,

examples/serial-dma-circ.rs

@@ -50,8 +50,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9_600.bps()),
         &clocks,
     );

examples/serial-dma-peek.rs

@@ -49,8 +49,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default(),
         &clocks,
     );

examples/serial-dma-rx.rs

@@ -49,8 +49,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9_600.bps()),
         &clocks,
     );

examples/serial-dma-tx.rs

@@ -49,8 +49,7 @@ fn main() -> ! {
 
     let serial = Serial::new(
         p.USART1,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

examples/serial-fmt.rs

@@ -61,8 +61,7 @@ fn main() -> ! {
     // the registers are used to enable and configure the device.
     let serial = Serial::new(
         p.USART3,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

examples/serial-interrupt-idle.rs

@@ -45,7 +45,7 @@ fn main() -> ! {
     // Set up the usart device. Takes ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
     let (mut tx, mut rx) =
-        Serial::new(p.USART1, (tx, rx), &mut afio.mapr, 115_200.bps(), &clocks).split();
+        Serial::new(p.USART1, (tx, rx, &mut afio.mapr), 115_200.bps(), &clocks).split();
     tx.listen();
     rx.listen();
     rx.listen_idle();
@@ -69,7 +69,7 @@ static mut WIDX: usize = 0;
 unsafe fn write(buf: &[u8]) {
     if let Some(tx) = TX.as_mut() {
         buf.iter()
-            .for_each(|w| if let Err(_err) = nb::block!(tx.write_u8(*w)) {})
+            .for_each(|w| if let Err(_err) = nb::block!(tx.write(*w)) {})
     }
 }
 #[interrupt]

examples/serial.rs

@@ -14,11 +14,7 @@ use cortex_m::asm;
 use nb::block;
 
 use cortex_m_rt::entry;
-use stm32f1xx_hal::{
-    pac,
-    prelude::*,
-    serial::{Config, Serial},
-};
+use stm32f1xx_hal::{pac, prelude::*, serial::Config};
 
 #[entry]
 fn main() -> ! {
@@ -60,10 +56,8 @@ fn main() -> ! {
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let mut serial = Serial::new(
-        p.USART3,
-        (tx, rx),
-        &mut afio.mapr,
+    let mut serial = p.USART3.serial(
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

examples/serial_9bits.rs

@@ -13,6 +13,7 @@ use cortex_m_rt::entry;
 use nb::block;
 use panic_halt as _;
 use stm32f1xx_hal::{
+    gpio::{Floating, PushPull},
     pac,
     prelude::*,
     serial::{self, Config, Error, Serial},
@@ -111,17 +112,16 @@ fn main() -> ! {
     let mut afio = p.AFIO.constrain();
 
     // Prepare the GPIOB peripheral.
-    let mut gpiob = p.GPIOB.split();
+    let gpiob = p.GPIOB.split();
 
-    let tx_pin = gpiob.pb10.into_alternate_push_pull(&mut gpiob.crh);
+    let tx_pin = gpiob.pb10;
     let rx_pin = gpiob.pb11;
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let serial = Serial::new(
+    let serial = Serial::<_, PushPull, Floating>::new(
         p.USART3,
-        (tx_pin, rx_pin),
-        &mut afio.mapr,
+        (tx_pin, rx_pin, &mut afio.mapr),
         Config::default()
             .baudrate(9600.bps())
             .wordlength_9bits()

examples/serial_config.rs

@@ -60,8 +60,7 @@ fn main() -> ! {
     // the registers are used to enable and configure the device.
     let serial = Serial::new(
         p.USART3,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         serial::Config::default()
             .baudrate(9600.bps())
             .stopbits(serial::StopBits::STOP2)

examples/serial_reconfigure.rs

@@ -62,8 +62,7 @@ fn main() -> ! {
     // the registers are used to enable and configure the device.
     let mut serial = Serial::new(
         p.USART3,
-        (tx, rx),
-        &mut afio.mapr,
+        (tx, rx, &mut afio.mapr),
         Config::default().baudrate(9600.bps()),
         &clocks,
     );

examples/spi-dma.rs

@@ -40,7 +40,7 @@ fn main() -> ! {
         polarity: Polarity::IdleLow,
         phase: Phase::CaptureOnFirstTransition,
     };
-    let spi = Spi::spi2(dp.SPI2, pins, spi_mode, 100.kHz(), &clocks);
+    let spi = Spi::new(dp.SPI2, pins, spi_mode, 100.kHz(), &clocks);
 
     // Set up the DMA device
     let dma = dp.DMA1.split();