gpio field enums

CHANGELOG.md

@@ -11,10 +11,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 - Relax pin type generics for `Serial`, `I2c`, `Spi`, `Can`. [#462]
   Use enums of pin tuples and `Enum::from<(tuple)>` for pin remap before passing to peripheral.
-  Remove `RemapStruct`s. [#462]
+  Remove `RemapStruct`s. [#462] [#506]
 - Use independent `Spi` and `SpiSlave` structures instead of `OP` generic [#462]
 - Take `&Clocks` instead of `Clocks` [#498]
-- Temporary replace `stm32f1` with `stm32f1-staging`
+- Temporary replace `stm32f1` with `stm32f1-staging` [#503]
 
 ### Changed
 
@@ -23,8 +23,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Replace UB code by a legitimate pointer access [#480]
 - Fix flash error flag clearing [#489]
 - Clarify README for windows users [#496]
-- Check "device selected" in `build.rs`
-- Unmacro `dma.rs`
+- Check "device selected" in `build.rs` [#502]
+- Use gpio field enums internally [#506]
+- Unmacro `dma.rs` [#505]
 
 ### Added
 
@@ -35,6 +36,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Reexport `Direction` from `qei` [#479]
 - Add DAC [#483]
 - Add an option to allow overclocking [#494]
+- `new` on gpio mode [#506]
 
 [#416]: https://github.com/stm32-rs/stm32f1xx-hal/pull/416
 [#453]: https://github.com/stm32-rs/stm32f1xx-hal/pull/453
@@ -48,6 +50,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#494]: https://github.com/stm32-rs/stm32f1xx-hal/pull/494
 [#496]: https://github.com/stm32-rs/stm32f1xx-hal/pull/496
 [#498]: https://github.com/stm32-rs/stm32f1xx-hal/pull/498
+[#502]: https://github.com/stm32-rs/stm32f1xx-hal/pull/502
+[#503]: https://github.com/stm32-rs/stm32f1xx-hal/pull/503
+[#505]: https://github.com/stm32-rs/stm32f1xx-hal/pull/505
+[#506]: https://github.com/stm32-rs/stm32f1xx-hal/pull/506
 
 ## [v0.10.0] - 2022-12-12
 

examples/blinky_timer_irq.rs

@@ -15,7 +15,7 @@
 use stm32f1xx_hal as hal;
 
 use crate::hal::{
-    gpio::{gpioc, Output, PushPull},
+    gpio::{gpioc, Output, PinState, PushPull},
     pac::{interrupt, Interrupt, Peripherals, TIM2},
     prelude::*,
     timer::{CounterMs, Event},
@@ -45,7 +45,7 @@
 #[interrupt]
 fn TIM2() {
     static mut LED: Option<LedPin> = None;
     static mut TIM: Option<CounterMs<TIM2>> = None;
 
     let led = LED.get_or_insert_with(|| {
         cortex_m::interrupt::free(|cs| {
@@ -79,8 +79,9 @@
 
     // Configure PC13 pin to blink LED
     let mut gpioc = dp.GPIOC.split();
-    let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
-    let _ = led.set_high(); // Turn off
+    let led = Output::new(gpioc.pc13, &mut gpioc.crh, PinState::High);
+    //or
+    //let led = gpioc.pc13.into_push_pull_output_with_state(&mut gpioc.crh, PinState::High);
 
     // Move the pin into our global storage
     cortex_m::interrupt::free(|cs| *G_LED.borrow(cs).borrow_mut() = Some(led));

examples/can-echo.rs

@@ -10,7 +10,7 @@ use panic_halt as _;
 use bxcan::filter::Mask32;
 use cortex_m_rt::entry;
 use nb::block;
-use stm32f1xx_hal::{gpio::Floating, pac, prelude::*};
+use stm32f1xx_hal::{pac, prelude::*};
 
 #[entry]
 fn main() -> ! {
@@ -31,7 +31,7 @@ fn main() -> ! {
         let rx = gpioa.pa11;
         let tx = gpioa.pa12;
 
-        let can = dp.CAN1.can::<Floating>(
+        let can = dp.CAN1.can(
             #[cfg(not(feature = "connectivity"))]
             dp.USB,
             (tx, rx, &mut afio.mapr),
@@ -51,9 +51,7 @@ fn main() -> ! {
     #[cfg(feature = "connectivity")]
     let _can2 = {
         let gpiob = dp.GPIOB.split();
-        let can = dp
-            .CAN2
-            .can::<Floating>((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
+        let can = dp.CAN2.can((gpiob.pb6, gpiob.pb5, &mut afio.mapr));
 
         // APB1 (PCLK1): 8MHz, Bit rate: 125kBit/s, Sample Point 87.5%
         // Value was calculated with http://www.bittiming.can-wiki.info/

examples/serial_9bits.rs

@@ -13,10 +13,9 @@ use cortex_m_rt::entry;
 use nb::block;
 use panic_halt as _;
 use stm32f1xx_hal::{
-    gpio::{Floating, PushPull},
     pac,
     prelude::*,
-    serial::{self, Config, Error, Serial},
+    serial::{self, Config, Error},
 };
 
 // The address of the slave device.
@@ -119,8 +118,10 @@ fn main() -> ! {
 
     // Set up the usart device. Take ownership over the USART register and tx/rx pins. The rest of
     // the registers are used to enable and configure the device.
-    let serial = Serial::<_, PushPull, Floating>::new(
-        p.USART3,
+    //
+    //let serial = Serial::<_, PushPull, Floating>::new(p.USART3,
+    // or shorter
+    let serial = p.USART3.serial(
         (tx_pin, rx_pin, &mut afio.mapr),
         Config::default()
             .baudrate(9600.bps())

examples/spi-slave.rs

@@ -20,7 +20,6 @@ pub const MODE: Mode = Mode {
 };
 
 use stm32f1xx_hal::{
-    gpio::Floating,
     pac::{self, interrupt, Peripherals, SPI2},
     prelude::*,
     spi::{Event, SpiSlave},
@@ -49,7 +48,7 @@ fn main() -> ! {
 
     let spi1 = dp
         .SPI1
-        .spi::<Floating>((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
+        .spi((sck, miso, mosi, &mut afio.mapr), MODE, 10.kHz(), &clocks);
 
     // SPI2
     // Convert pins before SPI initialization

src/adc.rs

@@ -400,11 +400,10 @@ macro_rules! adc_hal {
                     self.rb.sqr3().modify(|_, w| unsafe { w.sq1().bits(chan) });
 
                     // ADC start conversion of regular sequence
-                    self.rb.cr2().modify(|_, w|
-                        w
-                            .swstart().set_bit()
-                            .align().bit(self.align.into())
-                    );
+                    self.rb.cr2().modify(|_, w| {
+                        w.swstart().set_bit();
+                        w.align().bit(self.align.into())
+                    });
                     while self.rb.cr2().read().swstart().bit_is_set() {}
                     // ADC wait for conversion results
                     while self.rb.sr().read().eoc().bit_is_clear() {}
@@ -680,14 +679,10 @@ macro_rules! adcdma {
                 Self: SetChannels<PINS>,
             {
                 self.rb.cr2().modify(|_, w| {
-                    w.adon()
-                        .clear_bit()
-                        .dma()
-                        .clear_bit()
-                        .cont()
-                        .clear_bit()
-                        .align()
-                        .bit(self.align.into())
+                    w.adon().clear_bit();
+                    w.dma().clear_bit();
+                    w.cont().clear_bit();
+                    w.align().bit(self.align.into())
                 });
                 self.rb
                     .cr1()
@@ -761,18 +756,12 @@ macro_rules! adcdma {
                 atomic::compiler_fence(Ordering::Release);
 
                 self.channel.ch().cr().modify(|_, w| {
-                    w.mem2mem()
-                        .clear_bit()
-                        .pl()
-                        .medium()
-                        .msize()
-                        .bits16()
-                        .psize()
-                        .bits16()
-                        .circ()
-                        .set_bit()
-                        .dir()
-                        .clear_bit()
+                    w.mem2mem().clear_bit();
+                    w.pl().medium();
+                    w.msize().bits16();
+                    w.psize().bits16();
+                    w.circ().set_bit();
+                    w.dir().clear_bit()
                 });
 
                 self.start();
@@ -799,18 +788,12 @@ macro_rules! adcdma {
 
                 atomic::compiler_fence(Ordering::Release);
                 self.channel.ch().cr().modify(|_, w| {
-                    w.mem2mem()
-                        .clear_bit()
-                        .pl()
-                        .medium()
-                        .msize()
-                        .bits16()
-                        .psize()
-                        .bits16()
-                        .circ()
-                        .clear_bit()
-                        .dir()
-                        .clear_bit()
+                    w.mem2mem().clear_bit();
+                    w.pl().medium();
+                    w.msize().bits16();
+                    w.psize().bits16();
+                    w.circ().clear_bit();
+                    w.dir().clear_bit()
                 });
                 self.start();
 

src/can.rs

@@ -122,34 +122,34 @@ macro_rules! remap {
 use remap;
 
 pub trait CanExt: Sized + Instance {
-    fn can<PULL>(
+    fn can(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-        pins: impl Into<Self::Pins<PULL>>,
-    ) -> Can<Self, PULL>;
-    fn can_loopback<PULL>(
+        pins: impl Into<Self::Pins<Floating>>,
+    ) -> Can<Self, Floating>;
+    fn can_loopback(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-    ) -> Can<Self, PULL>;
+    ) -> Can<Self, Floating>;
 }
 
 impl<CAN: Instance> CanExt for CAN {
-    fn can<PULL>(
+    fn can(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-        pins: impl Into<Self::Pins<PULL>>,
-    ) -> Can<Self, PULL> {
+        pins: impl Into<Self::Pins<Floating>>,
+    ) -> Can<Self, Floating> {
         Can::new(
             self,
             #[cfg(not(feature = "connectivity"))]
             usb,
             pins,
         )
     }
-    fn can_loopback<PULL>(
+    fn can_loopback(
         self,
         #[cfg(not(feature = "connectivity"))] usb: pac::USB,
-    ) -> Can<Self, PULL> {
+    ) -> Can<Self, Floating> {
         Can::new_loopback(
             self,
             #[cfg(not(feature = "connectivity"))]