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Optimize non-relaxed load/store on pre-v6 ARM Linux/Android #112
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Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state
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O-arm
Target: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state
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LLVM calls __sync_val_compare_and_swap_N/__sync_lock_test_and_set_N for them, but we can use ldr/str+__kuser_memory_barrier on Linux/Android.
This should also fix the problem that wide seqlock, which uses several acquire loads, is slower than spinlock on these targets. #82 (comment)