corrections in advanced x86 encoder

packages/x86-2/iset/avx.inc

@@ -61,7 +61,7 @@ EVEX_W1 = 1 shl 15
 EVEX_REQUIRED = 1 shl 10
 EVEX_FORBIDDEN = 1 shl 2
 EVEX_VL = 1 shl 22
-EVEX_VL_AVX2 = 1 shl 2
+EVEX_VL_AVX2 = 1 shl 32
 EVEX_BW = 1 shl 23
 EVEX_DQ = 1 shl 24
 
@@ -1036,6 +1036,25 @@ macro AVX_512.single_source_instruction vex_mpw,evex_f,opcode,unit,dest,src
 	end if
 end macro
 
+macro AVX_512.single_source_instruction_imm8 vex_mpw,evex_f,opcode,unit,dest,src,aux
+	AVX_512.parse_k1z_operand@dest dest
+	AVX_512.parse_operand@src src
+	x86.parse_operand@aux aux
+	if @dest.type = 'mmreg' & (@src.type = 'mem' | @src.type = 'mmreg')
+		if @aux.size and not 1
+			err 'invalid operand size'
+		else if unit & ( @dest.size <> (unit-1) and not 15 + 16 | (@src.type = 'mem' & @src.size and not unit) )
+			err 'invalid operand size'
+		else if @src.size and not @dest.size & (unit = 0 | @src.type = 'mmreg')
+			err 'operand sizes do not match'
+		end if
+		@src.memsize = unit
+		AVX_512.store_instruction@src @dest.size,vex_mpw,evex_f,opcode,@dest.mask,@dest.rm,,1,@aux.imm
+	else
+		err 'invalid combination of operands'
+	end if
+end macro
+
 iterate <instr,opcode>, add,58h, mul,59h, sub,5Ch, div,5Eh
 
 	macro v#instr#pd? dest*,src*,src2*&
@@ -1152,6 +1171,33 @@ macro vshufps? dest*,src*,src2*,aux*&
 	AVX_512.basic_instruction_bcst_imm8 VEX_0F_W0,EVEX_AS_VEX+EVEX_VL,0C6h,4,dest,src,src2,aux
 end macro
 
+iterate <instr,opcode>, blendps,0Ch, blendpd,0Dh
+
+	macro v#instr? dest*,src*,src2*,imm*
+		AVX_512.basic_instruction_imm8 VEX_66_0F3A_W0,EVEX_FORBIDDEN,opcode,0,dest,src,src2,imm
+	end macro
+
+end iterate
+
+iterate <instr,opcode>, blendvps,4Ah, blendvpd,4Bh
+
+	macro v#instr? dest*,src*,src2*,mask*
+		AVX_512.parse_operand@dest dest
+		AVX_512.parse_operand@src src
+		AVX_512.parse_operand@src2 src2
+		AVX_512.parse_operand@aux mask
+		if @dest.type = 'mmreg' & @src.type = 'mmreg' & (@src2.type = 'mem' | @src2.type = 'mmreg') & @aux.type = 'mmreg'
+			if @src.size <> @dest.size | @src2.size and not @dest.size | @aux.size <> @dest.size
+				err 'operand sizes do not match'
+			end if
+			AVX_512.store_instruction@src2 @dest.size,VEX_66_0F3A_W0,EVEX_FORBIDDEN,opcode,0,@dest.rm,@src.rm,1,(@aux.rm and 1111b) shl 4
+		else
+			err 'invalid combination of operands'
+		end if
+	end macro
+
+end iterate
+
 macro vbroadcastss? dest*,src*
 	require AVX2+
 	AVX_512.parse_k1z_operand@dest dest
@@ -2716,9 +2762,9 @@ iterate <instr,opcode,asize>, vpgatherdd,90h,4, vpgatherqd,91h,8, vgatherdps,92h
 			end if
 		else
 			require AVX2+
-			AVX.parse_operand@dest dest
-			AVX.parse_vsib_operand@src src
-			AVX.parse_operand@aux aux
+			AVX_512.parse_operand@dest dest
+			AVX_512.parse_vsib_operand@src src
+			AVX_512.parse_operand@aux aux
 			if @dest.type = 'mmreg' & @src.type = 'mem' & @aux.type = 'mmreg'
 				if @src.size and not 4 | (@dest.size > 16 & @dest.size * (asize shr 2) > @src.visize) | (@src.visize > 16 & @dest.size * (asize shr 2) < @src.visize)
 					err 'invalid operand size'
@@ -2755,9 +2801,9 @@ iterate <instr,opcode,asize>, vpgatherdq,90h,4, vpgatherqq,91h,8, vgatherdpd,92h
 			end if
 		else
 			require AVX2+
-			AVX.parse_operand@dest dest
-			AVX.parse_vsib_operand@src src
-			AVX.parse_operand@aux aux
+			AVX_512.parse_operand@dest dest
+			AVX_512.parse_vsib_operand@src src
+			AVX_512.parse_operand@aux aux
 			if @dest.type = 'mmreg' & @src.type = 'mem' & @aux.type = 'mmreg'
 				if @src.size and not 8 | (@dest.size > 16 & @dest.size * (asize shr 2) > @src.visize * 2) | (@src.visize > 16 & @dest.size * (asize shr 2) < @src.visize * 2)
 					err 'invalid operand size'
@@ -3880,7 +3926,7 @@ macro vdpps? dest*,src*,src2*,imm*
 end macro
 
 macro vlddqu? dest*,src*
-	AVX.parse_operand@dest dest
+	AVX_512.parse_operand@dest dest
 	x86.parse_operand@src src
 	if @dest.type = 'mmreg' & @src.type = 'mem'
 		if @src.size and not @dest.size

packages/x86-2/iset/sse3.inc

@@ -76,7 +76,7 @@ macro palignr? dest*,src*,aux*
 		if @aux.size and not 1
 			err 'invalid operand size'
 		end if
-		MMX.select_operand_prefix @src,@dest.size
+		MMX.select_operand_prefix@src @dest.size
 		x86.store_instruction@src <0Fh,3Ah,0Fh>,@dest.rm,1,@aux.imm
 	else
 		err 'invalid combination of operands'

packages/x86-2/iset/sse4.inc

@@ -149,7 +149,7 @@ macro pextrw? dest*,src*,sel*
 		if @dest.size <> 4 | @aux.size and not 1
 			err 'invalid operand size'
 		end if
-		MMX.select_operand_prefix @src,@src.size
+		MMX.select_operand_prefix@src @src.size
 		x86.store_instruction@src <0Fh,0C5h>,@dest.rm,1,@aux.imm
 	else if @dest.type = 'mem' & (@src.type = 'mmreg' & @src.size = 16) & @aux.type = 'imm'
 		if @dest.size and not 2 | @aux.size and not 1

packages/x86-2/test.asm

@@ -16,3 +16,6 @@ use AMD64, bits64
 
     {imm32}	mov rax,1000	; 48 C7 C0 E8 03 00 00
     {imm64}	mov rax,1000	; 48 B8 E8 03 00 00 00 00 00 00
+
+    {AVX}	vaddpd ymm1,ymm2,[rbx+80h]	; C5 ED 58 8B 80 00 00 00
+    {AVX512}	vaddpd ymm1,ymm2,[rbx+80h]	; 62 F1 ED 28 58 4B 04

packages/x86-2/x86-2.inc

@@ -101,6 +101,12 @@ macro ? line&
 					c2 jno unsatisfied
 					c3 check x86.item and 1 shl value
 					c3 jno unsatisfied
+				else match +, operator
+					c1 compute x86.item, x86.item or value
+					c2 check x86.item and value = value
+					c2 jno unsatisfied
+					c3 check x86.item and value = value
+					c3 jno unsatisfied
 				else
 					err 'unknown syntax (',`association,')'
 				end match
@@ -226,8 +232,8 @@ end macro
 	Pentium4: cpu = 6, fpu = 5, simd = 30, ext = 0
 	AMD64: cpu = 8, fpu = 5, simd = 20, ext = x86.3DNow.ext
 
-	SSE4: simd = x86.SSE4.2.simd, ext | x86.POPCNT.ext
-	AVX512: simd = 60, ext | x86.AVX512VL.ext + x86.AVX512BW.ext + x86.AVX512DQ.ext + x86.AVX512CD.ext + x86.AVX512_IFMA.ext + x86.AVX512_VBMI.ext
+	SSE4: simd = x86.SSE4.2.simd, ext + x86.POPCNT.ext
+	AVX512: simd = x86.AVX512F.simd, ext + x86.AVX512VL.ext + x86.AVX512BW.ext + x86.AVX512DQ.ext + x86.AVX512CD.ext + x86.AVX512_IFMA.ext + x86.AVX512_VBMI.ext
 
 	everything: cpu = 8, fpu = 5, simd = 60, ext = -1