Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments

Using Nim to interface with SystemVerilog test benches via DPI-C

High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model

Example of DPI-C usage in UVM with Vivado simulator (xsim) and Altair (Metrics) DSim

Example of C/C++ register access with name through UVM RAL

Small wrapper for SystemVerilog DPI-C header svdpi.h

First Step in UVM

Basic APB-compatible module designed for use with Verilator, but should work with any DPI-C compatible simulator.