fpga/common: Replace scheduler op table with generation ID

Signed-off-by: Alex Forencich <[email protected]>
ucsdsysnet · Mar 4, 2024 · 49433c5 · 49433c5
1 parent 737a6cc
commit 49433c5
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Showing 5 changed files with 57 additions and 175 deletions.
diff --git a/fpga/common/rtl/mqnic_tx_scheduler_block_rr.v b/fpga/common/rtl/mqnic_tx_scheduler_block_rr.v
@@ -229,7 +229,6 @@ tx_scheduler_rr #(
     .LEN_WIDTH(DMA_LEN_WIDTH),
     .REQ_DEST_WIDTH(AXIS_TX_DEST_WIDTH),
     .REQ_TAG_WIDTH(TX_REQ_TAG_WIDTH),
-    .OP_TABLE_SIZE(TX_SCHEDULER_OP_TABLE_SIZE),
     .QUEUE_INDEX_WIDTH(QUEUE_INDEX_WIDTH),
     .PIPELINE(TX_SCHEDULER_PIPELINE),
     .SCHED_CTRL_ENABLE(0),

diff --git a/fpga/common/rtl/mqnic_tx_scheduler_block_rr_tdma.v b/fpga/common/rtl/mqnic_tx_scheduler_block_rr_tdma.v
@@ -400,7 +400,6 @@ tx_scheduler_rr #(
     .LEN_WIDTH(DMA_LEN_WIDTH),
     .REQ_DEST_WIDTH(AXIS_TX_DEST_WIDTH),
     .REQ_TAG_WIDTH(TX_REQ_TAG_WIDTH),
-    .OP_TABLE_SIZE(TX_SCHEDULER_OP_TABLE_SIZE),
     .QUEUE_INDEX_WIDTH(QUEUE_INDEX_WIDTH),
     .PIPELINE(TX_SCHEDULER_PIPELINE),
     .SCHED_CTRL_ENABLE(1),