Skip to content
Custom TLV - test with simulator target

Added Xilinx UltraScale+ MPSoC CSU Support #822

Sign in to view logs

Added Xilinx UltraScale+ MPSoC CSU Support

Added Xilinx UltraScale+ MPSoC CSU Support #822

Triggered via pull request February 8, 2025 02:02
@dgarskedgarske
synchronize #545
dgarske:zynqmp_rot
Status Success
Total duration 31s
Artifacts –

test-custom-tlv-simulator.yml

on: pull_request
custom_tlv_simulator_tests
15s
custom_tlv_simulator_tests
Fit to window
Zoom out
Zoom in