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Merge branch 'acidanthera:master' into YamingNetwork
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@wy414012
wy414012 authored Dec 29, 2024
2 parents 25dca6e + f4b7065 commit 3350aca
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Showing 9 changed files with 136 additions and 108 deletions.
2 changes: 2 additions & 0 deletions Changelog.md
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Expand Up @@ -5,6 +5,8 @@ OpenCore Changelog
- Added static IPv4 configuration options to OpenNetworkBoot
- Removed `--` prefix from OpenNetworkBoot arguments (modify driver arguments if using this driver)
- Updated `Unload` option to unload drivers in reverse of the order in which they were loaded
- Fixed `MSR_IA32_TSC_ADJUST` access on unsupported CPUs (e.g. Virtualization.framework), thx @t0rr3sp3dr0
- Downgraded WARN log level to INFO for ALREADY_STARTED in AudioDxe (restores ability to include DEBUG_WARN in HaltLevel if required when using this driver)

#### v1.0.3
- Fixed support for `AMD_CPU_EXT_FAMILY_1AH`, thx @Shaneee
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2 changes: 1 addition & 1 deletion Docs/Configuration.md5
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@@ -1 +1 @@
ef3068b64e8c0e6ee10356443bc2bc54
da5fb7189c2a15035f7e66a3a20a25ca
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3 changes: 2 additions & 1 deletion Docs/Configuration.tex
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Expand Up @@ -8801,7 +8801,8 @@ \subsection{Output Properties}\label{uefioutputprops}
(e.g. \texttt{1920x1080}) formatted string to request custom resolution
from GOP if available.
\item Set to \texttt{Max} to attempt using the largest
available screen resolution.
available screen resolution. When set to \texttt{Max} all available resolutions
will be listed in lines starting \texttt{OCC: Mode} in the debug log.
\end{itemize}

On HiDPI screens \texttt{APPLE\_VENDOR\_VARIABLE\_GUID} \texttt{UIScale}
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7 changes: 4 additions & 3 deletions Docs/Differences/Differences.tex
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@@ -1,7 +1,7 @@
\documentclass[]{article}
%DIF LATEXDIFF DIFFERENCE FILE
%DIF DEL PreviousConfiguration.tex Sat Dec 28 14:02:22 2024
%DIF ADD ../Configuration.tex Sat Dec 28 14:02:25 2024
%DIF DEL PreviousConfiguration.tex Sun Dec 29 04:11:10 2024
%DIF ADD ../Configuration.tex Sun Dec 29 04:31:06 2024

\usepackage{lmodern}
\usepackage{amssymb,amsmath}
Expand Down Expand Up @@ -8861,7 +8861,8 @@ \subsection{Output Properties}\label{uefioutputprops}
(e.g. \texttt{1920x1080}) formatted string to request custom resolution
from GOP if available.
\item Set to \texttt{Max} to attempt using the largest
available screen resolution.
available screen resolution\DIFaddbegin \DIFadd{. When set to }\texttt{\DIFadd{Max}} \DIFadd{all available resolutions
will be listed in lines starting }\texttt{\DIFadd{OCC: Mode}} \DIFadd{in the debug log}\DIFaddend .
\end{itemize}

On HiDPI screens \texttt{APPLE\_VENDOR\_VARIABLE\_GUID} \texttt{UIScale}
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221 changes: 119 additions & 102 deletions Library/OcCpuLib/FrequencyDetect.c
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Expand Up @@ -489,14 +489,17 @@ InternalCalculateARTFrequencyIntel (
UINT32 MaxId;
UINT32 CpuVendor;

UINT32 CpuidDenominatorEax;
UINT32 CpuidNumeratorEbx;
UINT32 CpuidARTFrequencyEcx;
CPUID_PROCESSOR_FREQUENCY_EAX CpuidFrequencyEax;
UINT64 TscAdjust;
UINT64 CPUFrequencyFromTSC;
CPUID_VERSION_INFO_EAX CpuidVerEax;
UINT8 Model;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX CpuidFeatureFlagsEbx;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX CpuidFeatureFlagsEcx;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EDX CpuidFeatureFlagsEdx;
UINT32 CpuidDenominatorEax;
UINT32 CpuidNumeratorEbx;
UINT32 CpuidARTFrequencyEcx;
CPUID_PROCESSOR_FREQUENCY_EAX CpuidFrequencyEax;
UINT64 TscAdjust;
UINT64 CPUFrequencyFromTSC;
CPUID_VERSION_INFO_EAX CpuidVerEax;
UINT8 Model;

if (Recalculate) {
ObtainedARTFreq = FALSE;
Expand All @@ -514,109 +517,123 @@ InternalCalculateARTFrequencyIntel (
//
// Determine our core crystal clock frequency
//
if ((CpuVendor == CPUID_VENDOR_INTEL) && (MaxId >= CPUID_TIME_STAMP_COUNTER)) {
TscAdjust = AsmReadMsr64 (MSR_IA32_TSC_ADJUST);
DEBUG ((DEBUG_INFO, "OCCPU: TSC Adjust %Lu\n", TscAdjust));

if (TscAdjustPtr != NULL) {
*TscAdjustPtr = TscAdjust;
if (CpuVendor == CPUID_VENDOR_INTEL) {
if (MaxId >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
AsmCpuidEx (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
0,
NULL,
&CpuidFeatureFlagsEbx.Uint32,
&CpuidFeatureFlagsEcx.Uint32,
&CpuidFeatureFlagsEdx.Uint32
);
if (CpuidFeatureFlagsEbx.Bits.IA32_TSC_ADJUST == 1) {
TscAdjust = AsmReadMsr64 (MSR_IA32_TSC_ADJUST);
DEBUG ((DEBUG_INFO, "OCCPU: TSC Adjust %Lu\n", TscAdjust));

if (TscAdjustPtr != NULL) {
*TscAdjustPtr = TscAdjust;
}
}
}

AsmCpuid (
CPUID_TIME_STAMP_COUNTER,
&CpuidDenominatorEax,
&CpuidNumeratorEbx,
&CpuidARTFrequencyEcx,
NULL
);
if (CpuidARTFrequencyEcx > 0) {
ARTFrequency = CpuidARTFrequencyEcx;
DEBUG ((DEBUG_INFO, "OCCPU: Queried Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
} else {
AsmCpuid (CPUID_VERSION_INFO, &CpuidVerEax.Uint32, NULL, NULL, NULL);
Model = (UINT8)CpuidVerEax.Bits.Model | (UINT8)(CpuidVerEax.Bits.ExtendedModelId << 4U);
//
// Fall back to identifying ART frequency based on known models
//
switch (Model) {
case CPU_MODEL_SKYLAKE:
case CPU_MODEL_SKYLAKE_DT:
case CPU_MODEL_KABYLAKE:
case CPU_MODEL_KABYLAKE_DT:
ARTFrequency = CLIENT_ART_CLOCK_SOURCE; // 24 Mhz
break;
case CPU_MODEL_DENVERTON:
ARTFrequency = SERVER_ART_CLOCK_SOURCE; // 25 Mhz
break;
case CPU_MODEL_GOLDMONT:
ARTFrequency = ATOM_ART_CLOCK_SOURCE; // 19.2 Mhz
break;
}
if (MaxId >= CPUID_TIME_STAMP_COUNTER) {
AsmCpuid (
CPUID_TIME_STAMP_COUNTER,
&CpuidDenominatorEax,
&CpuidNumeratorEbx,
&CpuidARTFrequencyEcx,
NULL
);
if (CpuidARTFrequencyEcx > 0) {
ARTFrequency = CpuidARTFrequencyEcx;
DEBUG ((DEBUG_INFO, "OCCPU: Queried Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
} else {
AsmCpuid (CPUID_VERSION_INFO, &CpuidVerEax.Uint32, NULL, NULL, NULL);
Model = (UINT8)CpuidVerEax.Bits.Model | (UINT8)(CpuidVerEax.Bits.ExtendedModelId << 4U);
//
// Fall back to identifying ART frequency based on known models
//
switch (Model) {
case CPU_MODEL_SKYLAKE:
case CPU_MODEL_SKYLAKE_DT:
case CPU_MODEL_KABYLAKE:
case CPU_MODEL_KABYLAKE_DT:
ARTFrequency = CLIENT_ART_CLOCK_SOURCE; // 24 Mhz
break;
case CPU_MODEL_DENVERTON:
ARTFrequency = SERVER_ART_CLOCK_SOURCE; // 25 Mhz
break;
case CPU_MODEL_GOLDMONT:
ARTFrequency = ATOM_ART_CLOCK_SOURCE; // 19.2 Mhz
break;
}

if (ARTFrequency > 0) {
DEBUG ((DEBUG_INFO, "OCCPU: Known Model Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
if (ARTFrequency > 0) {
DEBUG ((DEBUG_INFO, "OCCPU: Known Model Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
}
}
}

if ((CpuidDenominatorEax > 0) && (CpuidNumeratorEbx > 0)) {
//
// Some Intel chips don't report their core crystal clock frequency.
// Calculate it by dividing the TSC frequency by the TSC ratio.
//
if ((ARTFrequency == 0) && (MaxId >= CPUID_PROCESSOR_FREQUENCY)) {
CPUFrequencyFromTSC = InternalCalculateTSCFromPMTimer (Recalculate);
ARTFrequency = BaseMultThenDivU64x64x32 (
CPUFrequencyFromTSC,
CpuidDenominatorEax,
CpuidNumeratorEbx,
NULL
);
if (ARTFrequency > 0ULL) {
DEBUG ((
DEBUG_INFO,
"OCCPU: Core Crystal Clock Frequency from TSC %11LuHz = %11LuHz * %u / %u\n",
ARTFrequency,
CPUFrequencyFromTSC,
CpuidDenominatorEax,
CpuidNumeratorEbx
));
//
// Use the reported CPU frequency rather than deriving it from ARTFrequency
//
AsmCpuid (CPUID_PROCESSOR_FREQUENCY, &CpuidFrequencyEax.Uint32, NULL, NULL, NULL);
CPUFrequencyFromART = MultU64x32 (CpuidFrequencyEax.Bits.ProcessorBaseFrequency, 1000000);
if ((CpuidDenominatorEax > 0) && (CpuidNumeratorEbx > 0)) {
//
// Some Intel chips don't report their core crystal clock frequency.
// Calculate it by dividing the TSC frequency by the TSC ratio.
//
if ((ARTFrequency == 0) && (MaxId >= CPUID_PROCESSOR_FREQUENCY)) {
CPUFrequencyFromTSC = InternalCalculateTSCFromPMTimer (Recalculate);
ARTFrequency = BaseMultThenDivU64x64x32 (
CPUFrequencyFromTSC,
CpuidDenominatorEax,
CpuidNumeratorEbx,
NULL
);
if (ARTFrequency > 0ULL) {
DEBUG ((
DEBUG_INFO,
"OCCPU: Core Crystal Clock Frequency from TSC %11LuHz = %11LuHz * %u / %u\n",
ARTFrequency,
CPUFrequencyFromTSC,
CpuidDenominatorEax,
CpuidNumeratorEbx
));
//
// Use the reported CPU frequency rather than deriving it from ARTFrequency
//
AsmCpuid (CPUID_PROCESSOR_FREQUENCY, &CpuidFrequencyEax.Uint32, NULL, NULL, NULL);
CPUFrequencyFromART = MultU64x32 (CpuidFrequencyEax.Bits.ProcessorBaseFrequency, 1000000);
}
}
}

//
// If we still can't determine the core crystal clock frequency, assume
// it's 24 Mhz like most Intel chips to date.
//
if (ARTFrequency == 0ULL) {
ARTFrequency = DEFAULT_ART_CLOCK_SOURCE;
DEBUG ((DEBUG_INFO, "OCCPU: Fallback Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
}
//
// If we still can't determine the core crystal clock frequency, assume
// it's 24 Mhz like most Intel chips to date.
//
if (ARTFrequency == 0ULL) {
ARTFrequency = DEFAULT_ART_CLOCK_SOURCE;
DEBUG ((DEBUG_INFO, "OCCPU: Fallback Core Crystal Clock Frequency %11LuHz\n", ARTFrequency));
}

ASSERT (ARTFrequency > 0ULL);
if (CPUFrequencyFromART == 0ULL) {
CPUFrequencyFromART = BaseMultThenDivU64x64x32 (
ARTFrequency,
CpuidNumeratorEbx,
CpuidDenominatorEax,
NULL
);
}
ASSERT (ARTFrequency > 0ULL);
if (CPUFrequencyFromART == 0ULL) {
CPUFrequencyFromART = BaseMultThenDivU64x64x32 (
ARTFrequency,
CpuidNumeratorEbx,
CpuidDenominatorEax,
NULL
);
}

ASSERT (CPUFrequencyFromART > 0ULL);
DEBUG ((
DEBUG_INFO,
"OCCPU: CPUFrequencyFromART %11LuHz %5LuMHz = %Lu * %u / %u\n",
CPUFrequencyFromART,
DivU64x32 (CPUFrequencyFromART, 1000000),
ARTFrequency,
CpuidNumeratorEbx,
CpuidDenominatorEax
));
ASSERT (CPUFrequencyFromART > 0ULL);
DEBUG ((
DEBUG_INFO,
"OCCPU: CPUFrequencyFromART %11LuHz %5LuMHz = %Lu * %u / %u\n",
CPUFrequencyFromART,
DivU64x32 (CPUFrequencyFromART, 1000000),
ARTFrequency,
CpuidNumeratorEbx,
CpuidDenominatorEax
));
}
}
}
}
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9 changes: 8 additions & 1 deletion Staging/AudioDxe/HdaController/HdaController.c
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Expand Up @@ -1096,6 +1096,13 @@ HdaControllerDriverBindingStart (
OpenMode
);

if ( (OpenMode == EFI_OPEN_PROTOCOL_BY_DRIVER)
&& (Status == EFI_ALREADY_STARTED))
{
DEBUG ((DEBUG_INFO, "HDA: %a%a - %r\n", "Open PCI I/O protocol", "", Status));
return Status;
}

if (EFI_ERROR (Status)) {
if ( PcdGetBool (PcdAudioControllerTryProtocolGetMode)
&& (Status == EFI_ACCESS_DENIED)
Expand All @@ -1112,7 +1119,7 @@ HdaControllerDriverBindingStart (
continue;
}

DEBUG ((DEBUG_WARN, "HDA: Open PCI I/O protocol (try DisconnectHda quirk?) - %r\n", Status));
DEBUG ((DEBUG_WARN, "HDA: %a%a - %r\n", "Open PCI I/O protocol", " (try DisconnectHda quirk?)", Status));
return Status;
}
} while (EFI_ERROR (Status));
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