Port Zephyr RPI5 patches to zephyr-v3.6.0-xt #111
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IIUC previous implementation was based on zephyr-v3.3.0. I think it will be great to move the next rpi5 Relese to zephyr-v3.6.0 |
Not sure what do you mean by "v3.3.0" :(?
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Sry. Misunderstood the point of this pr. Thought it's based on zephyr-v3.3.0-xt. |
Add GPIO driver for brcmstb, required by Raspberry Pi 5. Signed-off-by: Junho Lee <[email protected]> (cherry picked from commit 31badda) Signed-off-by: Grygorii Strashko <[email protected]>
Add support for BCM2712, SoC of Raspberry Pi 5. Signed-off-by: Junho Lee <[email protected]> (cherry picked from commit 76ec481) Signed-off-by: Grygorii Strashko <[email protected]>
Add support for Raspberry Pi 5. Currently only internal GPIO(gio_aon) is supported. 'Blinky' is the only sample that is working for now. Signed-off-by: Junho Lee <[email protected]> (cherry picked from commit 73f4102) Signed-off-by: Grygorii Strashko <[email protected]>
Enable serial communication through UART port between HDMI ports. Signed-off-by: Myeonghyeon Park <[email protected]> Signed-off-by: Junho Lee <[email protected]> (cherry picked from commit 63692c1) Signed-off-by: Grygorii Strashko <[email protected]>
Mainline zephyr is moved to HWM v2 which rearranged *soc* and *boards* which prevents usage of patches [1] as is. Hence backport bcm2712 to old HWM. Not for upstream. [1] zephyrproject-rtos#70538 Signed-off-by: Grygorii Strashko <[email protected]>
Mainline zephyr is moved to HWM v2 which rearranged *soc* and *boards* which prevents usage of patches [1] as is. Hence backport RPI5 board to old HWM. Not for upstream. [1] zephyrproject-rtos#70538 Signed-off-by: Grygorii Strashko <[email protected]>
Add rpi_5_xen_domd snippet to demonstrate enabling RPI 5 HW in Xen domain. Only GPIO LED is supported. Signed-off-by: Grygorii Strashko <[email protected]>
Add Xen specific documentation. Signed-off-by: Grygorii Strashko <[email protected]>
Rather than relying to the alphanumeric test ordering implemented in ZTEST to ensure certain tests run first, setup the SDHC IO properties to known good values before starting any of the tests. This allows the SDHC tests to run in any order, rather than needing certain tests to run first. Signed-off-by: Daniel DeGrasse <[email protected]> (cherry picked from commit 2be937d)
The UART "arm,pl011" required interrupt-names (any values) to be defined to enable UART IRQs. Hence, add interrupt-names to "arm,pl011" node. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
Add DT bindings for Broadcom BCM2712 SDHC v3.0 module, which is present on raspberry pi 5 platform. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
Add DT node for BCM2712 SDHC sdio1 which handles removable SD-card slot on Raspberry PI 5. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
RPI5 has 4G of memory and some samples/tests require more memory than it's defined now, so increase RAM size to 4M. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
The Raspberry PI 5 has SD-card slot which is serviced by sdio1 mmc@1000fff000 SDHC module. This patch adds basic DT nodes required to enabled sdmmc support on rpi_5 board. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
Add Broadcom BCM2712 SDHC driver which implements SD Host Controller v3.0. Only removable SD-card interface is supported and tested with FAT file-system. Supported/tested: - only SD Card support verified; - bus power ON/OFF; - only 3.3V bus voltage; - bus width 1,4; - clock rate 40KHz, 25MHz, 50MHz; - timings Legacy/SDR12, SDR25, DDR50; - signal voltage 3.3V and 1.8V with DDR50; - PIO transfer; - SDMA transfer; - only polling transfer. Not supported/tested: - no IRQ support - ADMA; - no tuning; - SDR50 can be enabled, but no tuning; - SDR104 Tested with samples/subsys/fs/fs_sample: west build -b rpi_5 -p always samples/subsys/fs/fs_sample with CONFIG_FILE_SYSTEM_SHELL enabled. Tested with tests/drivers/sdhc: west build -b rpi_5 -p always tests/drivers/sdhc/ - PASS - [sdhc.test_card_if_cond] duration = 1.503 seconds - PASS - [sdhc.test_card_presence] duration = 0.001 seconds - PASS - [sdhc.test_host_props] duration = 0.001 seconds - PASS - [sdhc.test_reset] duration = 0.002 seconds - PASS - [sdhc.test_set_io] duration = 0.008 seconds Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
Enable samples/subsys/fs/fs_sample for rpi_5 board. - add shell - disable SD card modifications Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
The Kconfig option enables support for 64-bit LBA, which also allows to enable GPT support. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]>
This option switches support for multiple volumes on the physical drive. By
default (0), each logical drive number is bound to the same physical drive
number and only an FAT volume found on the physical drive will be mounted.
When this function is enabled (1), each logical drive number can be bound
to arbitrary physical drive and partition listed in the VolToPart[].
For example, 2 FAT partition on SD disk (3) in terms of Zephyr:
{3, 1} - mount point "/0:"
{3, 2} - mount point "/1:"
The mount points have to be numbered in this case.
Signed-off-by: Grygorii Strashko <[email protected]>
Reviewed-by: Volodymyr Babchuk <[email protected]>
The SD write operation fail is observed because the is_read flag is not initialized properly and, as result got value from stack. This causes Write operation to be performed with is_read == true and so to fail. Fix it by initializing is_read properly to false. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Volodymyr Babchuk <[email protected]> Reviewed-by: Dmytro Semenets <[email protected]>
Drop unused IO memory chunks. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Drop unused mmc properties as only SD support is declared for now. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Use proper Kconfig CONFIG_SD_CMD_TIMEOUT option for timeout in sdhc_stop_transfer() Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Use proper regs defines SDHCI_RESPONSE1/2/3 in sdhci_cmd_done(). Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Break polling loops if error detected. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
This patch adds SDHC ADMA2 support (32-bits only). The consumer expected to provide preallocated table of ADMA2 descriptors. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Dmytro Semenets <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Add support and enable SDHC ADMA2 by default. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Dmytro Semenets <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
To enable SDHC IRQ 273 (305) the number of IRQs supported by bcm2712 SoC need to be increased. The RPI5 bcm2712 SoC implements ARM GIC-400 which supports up to 480 SPI IRQs. Hhence, in absence of docs for RPI5 bcm2712 SoC, this patch increases number of supported IRQs for RPI5 bcm2712 SoC to max value 512 IRQs. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
added 3 commits
August 7, 2024 12:39
This patch introduces IRQ support in SDHC code. It adds two APIs for consumer drivers: - sdhc_enable_irq() which has to be called to enable IRQ support - sdhc_irq_cb() SDHC IRQ handler callback to be called by consumer from its IRQ handler. The generic SDHC implementation is using k_event to pass IRQ status information from IRQ handler to command/data transfer routines, which are using k_event_wait() API to wait for required IRQ events. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Add IRQ support for RPI5 bcm2712 SDHC driver. The IRQs are enabled by default and can be disabled with CONFIG_BRCM_BCM2712_SDHC_USE_IRQ Kconfig option. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
Add proper handling of sdhc_command->retries for SDHC requests. Signed-off-by: Grygorii Strashko <[email protected]> Acked-by: Mykola Kvach <[email protected]> Acked-by: Oleksii Moisieiev <[email protected]> Acked-by: Dmytro Firsov <[email protected]>
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updated:
hence PR #116 was merged the above HACK is removed. BUT Zephyr application should be set to CONFIG_XEN_DOMCTL_INTERFACE_VERSION=0x16 to be compatible with xen-troops/xen-4.19-xt0.1 Note. All patches are ported from rpi5_dev without changes, so they are reviewed and have all tags already. |
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As far as patches are already reviewed - then my Ack can be left. Also, when this will be merged I think we will probably have to make another release with both renesas and rpi5 support. After some testing for sure. |
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@mlohvynenko AOS team tried this branch with as and seen no diff with rpi5_dev |
firscity
reviewed
Aug 8, 2024
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No. But there is absolutely no changes which could affect them, no? |
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It touches common code, AoS on Gen3/Gen4 also uses eMMC, I am just curios if it can affect its functionality. |
SDHC common is generic SDH controller implementation which is NOT compatible with GenX and so not used there. |
firscity
approved these changes
Aug 9, 2024
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Depends on #110
Port Zephyr RPI5 specific patches to zephyr-v3.6.0-xt with intention to switch of from rpi5_dev branch.
Below Hack is still here for testing purposes:
HACK: TMP: xen: public: domctl: tmp adjust version
Depends on #116 to get rid of above HACK
UPD: hence PR #116 was merged the above HACK is removed. BUT Zephyr application should be set to CONFIG_XEN_DOMCTL_INTERFACE_VERSION=0x16 to be compatible with xen-troops/xen-4.19-xt0.1