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arch: Rename g_cpu_intstack_top to g_intstacktop
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and g_intstack_alloc to g_intstackalloc for naming consistency.

Signed-off-by: Xiang Xiao <[email protected]>
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@xiaoxiang781216
xiaoxiang781216 committed Apr 6, 2024
1 parent 6334760 commit 18b8fa7
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Showing 15 changed files with 93 additions and 93 deletions.
20 changes: 10 additions & 10 deletions arch/arm/src/cxd56xx/cxd56_irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -73,23 +73,23 @@ extern void up_send_irqreq(int idx, int irq, int cpu);
* These definitions provide the aligned stack allocations.
*/

static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3];

/* These definitions provide the "top" of the push-down stacks. */

const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] =
const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] =
{
(uint32_t)g_intstack_alloc + INTSTACK_SIZE,
(uint32_t)g_intstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE),
#if CONFIG_SMP_NCPUS > 2
(uint32_t)g_intstack_alloc + (3 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (3 * INTSTACK_SIZE),
#if CONFIG_SMP_NCPUS > 3
(uint32_t)g_intstack_alloc + (4 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (4 * INTSTACK_SIZE),
#if CONFIG_SMP_NCPUS > 4
(uint32_t)g_intstack_alloc + (5 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (5 * INTSTACK_SIZE),
#if CONFIG_SMP_NCPUS > 5
(uint32_t)g_intstack_alloc + (6 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (6 * INTSTACK_SIZE),
#endif /* CONFIG_SMP_NCPUS > 5 */
#endif /* CONFIG_SMP_NCPUS > 4 */
#endif /* CONFIG_SMP_NCPUS > 3 */
Expand Down Expand Up @@ -584,7 +584,7 @@ int up_prioritize_irq(int irq, int priority)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_cpu_intstack_top[cpu];
return g_intstacktop[cpu];
}
#endif

Expand All @@ -600,6 +600,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_cpu_intstack_top[cpu] - INTSTACK_SIZE;
return g_intstacktop[cpu] - INTSTACK_SIZE;
}
#endif
4 changes: 2 additions & 2 deletions arch/arm/src/goldfish/chip.h
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Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,7 @@
.macro setirqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */
ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand All @@ -107,7 +107,7 @@
.macro setfiqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */
ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand Down
28 changes: 14 additions & 14 deletions arch/arm/src/goldfish/goldfish_irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -46,36 +46,36 @@
* These definitions provide the aligned stack allocations.
*/

static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3];
static uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3];

/* These are arrays that point to the top of each interrupt stack */

uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_irqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_irqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE)
(uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE)
#endif
};

uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE
(uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE
#endif
};

Expand Down Expand Up @@ -138,7 +138,7 @@ void up_irqinitialize(void)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_irqstack_top[cpu];
return g_irqstacktop[cpu];
}

#endif
Expand All @@ -155,6 +155,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_irqstack_top[cpu] - INTSTACK_SIZE;
return g_irqstacktop[cpu] - INTSTACK_SIZE;
}
#endif
4 changes: 2 additions & 2 deletions arch/arm/src/imx6/chip.h
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Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@
.macro setirqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */
ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand All @@ -105,7 +105,7 @@
.macro setfiqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */
ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand Down
28 changes: 14 additions & 14 deletions arch/arm/src/imx6/imx_irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -49,36 +49,36 @@
* These definitions provide the aligned stack allocations.
*/

uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3];
uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3];
uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3];
uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3];

/* These are arrays that point to the top of each interrupt stack */

uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_irqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_irqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE)
(uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE)
#endif
};

uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE
(uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE
#endif
};

Expand Down Expand Up @@ -163,7 +163,7 @@ void up_irqinitialize(void)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_irqstack_top[cpu];
return g_irqstacktop[cpu];
}
#endif

Expand All @@ -179,6 +179,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_irqstack_top[cpu] - INTSTACK_SIZE;
return g_irqstacktop[cpu] - INTSTACK_SIZE;
}
#endif
12 changes: 6 additions & 6 deletions arch/arm/src/lc823450/lc823450_irq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -78,15 +78,15 @@
* These definitions provide the aligned stack allocations.
*/

uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3];
uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3];

/* These definitions provide the "top" of the push-down stacks. */

const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] =
const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] =
{
(uint32_t)g_intstack_alloc + INTSTACK_SIZE,
(uint32_t)g_intstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE),
#endif /* CONFIG_SMP_NCPUS > 1 */
};
#endif
Expand Down Expand Up @@ -831,7 +831,7 @@ int lc823450_irq_register(int irq, struct lc823450_irq_ops *ops)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_cpu_intstack_top[cpu];
return g_intstacktop[cpu];
}
#endif

Expand All @@ -847,6 +847,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_cpu_intstack_top[cpu] - INTSTACK_SIZE;
return g_intstacktop[cpu] - INTSTACK_SIZE;
}
#endif
4 changes: 2 additions & 2 deletions arch/arm/src/qemu/chip.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,7 @@
.macro setirqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */
ldr \tmp2, =g_irqstacktop /* tmp2=Array of IRQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand All @@ -107,7 +107,7 @@
.macro setfiqstack, tmp1, tmp2
mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */
ldr \tmp2, =g_fiqstacktop /* tmp2=Array of FIQ stack pointers */
lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
Expand Down
28 changes: 14 additions & 14 deletions arch/arm/src/qemu/qemu_irq.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -46,36 +46,36 @@
* These definitions provide the aligned stack allocations.
*/

static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_irqstackalloc[INTSTACK_ALLOC >> 3];
static uint64_t g_fiqstackalloc[INTSTACK_ALLOC >> 3];

/* These are arrays that point to the top of each interrupt stack */

uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_irqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_irqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_irqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (2 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE),
(uintptr_t)g_irqstackalloc + (3 * INTSTACK_SIZE),
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE)
(uintptr_t)g_irqstackalloc + (4 * INTSTACK_SIZE)
#endif
};

uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] =
uintptr_t g_fiqstacktop[CONFIG_SMP_NCPUS] =
{
(uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 2 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 2
(uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE,
(uintptr_t)g_fiqstackalloc + 3 * INTSTACK_SIZE,
#endif
#if CONFIG_SMP_NCPUS > 3
(uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE
(uintptr_t)g_fiqstackalloc + 4 * INTSTACK_SIZE
#endif
};

Expand Down Expand Up @@ -138,7 +138,7 @@ void up_irqinitialize(void)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_irqstack_top[cpu];
return g_irqstacktop[cpu];
}
#endif

Expand All @@ -154,6 +154,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_irqstack_top[cpu] - INTSTACK_SIZE;
return g_irqstacktop[cpu] - INTSTACK_SIZE;
}
#endif
12 changes: 6 additions & 6 deletions arch/arm/src/rp2040/rp2040_irq.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -63,15 +63,15 @@ extern void rp2040_send_irqreq(int irqreq);
* These definitions provide the aligned stack allocations.
*/

static uint64_t g_intstack_alloc[INTSTACK_ALLOC >> 3];
static uint64_t g_intstackalloc[INTSTACK_ALLOC >> 3];

/* These definitions provide the "top" of the push-down stacks. */

const uint32_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] =
const uint32_t g_intstacktop[CONFIG_SMP_NCPUS] =
{
(uint32_t)g_intstack_alloc + INTSTACK_SIZE,
(uint32_t)g_intstackalloc + INTSTACK_SIZE,
#if CONFIG_SMP_NCPUS > 1
(uint32_t)g_intstack_alloc + (2 * INTSTACK_SIZE),
(uint32_t)g_intstackalloc + (2 * INTSTACK_SIZE),
#endif /* CONFIG_SMP_NCPUS > 1 */
};
#endif /* defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7 */
Expand Down Expand Up @@ -449,7 +449,7 @@ int up_prioritize_irq(int irq, int priority)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_top(int cpu)
{
return g_cpu_intstack_top[cpu];
return g_intstacktop[cpu];
}
#endif

Expand All @@ -465,6 +465,6 @@ uintptr_t arm_intstack_top(int cpu)
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t arm_intstack_alloc(int cpu)
{
return g_cpu_intstack_top[cpu] - INTSTACK_SIZE;
return g_intstacktop[cpu] - INTSTACK_SIZE;
}
#endif
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