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Device integration tests #60

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Device integration tests #60

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a68023d
app for running integration tests and script to pull dependecies
aranXmos Jun 16, 2022
7b04799
changed ops
aranXmos Jun 17, 2022
136dd60
add single xcore ops registration
aranXmos Jul 19, 2022
dc3490d
Clean up app for integration tests
panickal-xmos Mar 20, 2023
955bcd8
Remove unused
panickal-xmos Mar 20, 2023
967a4cd
Remove unused
panickal-xmos Mar 26, 2023
b74f4b2
Reduce server memory
panickal-xmos Apr 12, 2023
ed9d552
Update
panickal-xmos Apr 24, 2023
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46 changes: 46 additions & 0 deletions app_integration_tests/Makefile
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# The TARGET variable determines what target system the application is
# compiled for. It either refers to an XN file in the source directories
# or a valid argument for the --target option when compiling.

# In this case, the target depends on the build configuration.
TARGET = XCORE-AI-EXPLORER-700.xn

# The APP_NAME variable determines the name of the final .xe file. It should
# not include the .xe postfix. If left blank the name will default to
# the project name
APP_NAME = app_int

# The flags passed to xcc when building the application
# You can also set the following to override flags for a particular language:
#
# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS
#
# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to
# xcc for the final link (mapping) stage.

APP_SHARED_FLAGS = -report \
-fcmdline-buffer-bytes=32 \
-O3 -fcomment-asm -fxscope -mcmodel=large -Wno-xcore-fptrgroup -save-temps \
-Wno-unknown-pragmas \
-Wno-bidirectional-buffered-port \
-g \
-D NUM_THREADS=5 \
-DTF_LITE_STATIC_MEMORY \
-DXCORE \
-lquadflash \
-DENABLE_USB -DXUD_CORE_CLOCK=700 -DGC2145 -DTF_LITE_STRIP_ERROR_STRINGS
SOURCE_DIRS = src

# The USED_MODULES variable lists other module used by the application.
USED_MODULES = lib_aisrv lib_xud lib_tflite_micro

XCC_FLAGS = $(APP_SHARED_FLAGS) -DUSB_TILE=tile[1]
XCC_CPP_FLAGS = $(APP_SHARED_FLAGS) -std=c++11
XCC_ASM_FLAGS = $(APP_SHARED_FLAGS)
#=============================================================================
# The following part of the Makefile includes the common build infrastructure
# for compiling XMOS applications. You should not need to edit below here.

XMOS_MAKE_PATH ?= ../..
include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common

83 changes: 83 additions & 0 deletions app_integration_tests/src/XCORE-AI-EXPLORER-700.xn
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<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">
<Type>Board</Type>
<Name>xcore.ai Explorer Kit</Name>

<Declarations>
<Declaration>tileref tile[2]</Declaration>
</Declarations>

<Packages>
<Package id="0" Type="XS3-UnA-1024-FB265">
<Nodes>
<Node Id="0" InPackageId="0" Type="XS3-L16A-1024" Oscillator="24MHz" SystemFrequency="700MHz" ReferenceFrequency="100MHz">
<Boot>
<Source Location="bootFlash"/>
</Boot>
<Extmem sizeMbit="1024" Frequency="87500000Hz">

<Padctrl clk="0x30" cke="0x30" cs_n="0x30" we_n="0x30" cas_n="0x30" ras_n="0x30" addr="0x30" ba="0x30" dq="0x31" dqs="0x31" dm="0x30"/>

<Lpddr emr_opcode="0x20" protocol_engine_conf_0="0x2aa"/>
</Extmem>
<Tile Number="0" Reference="tile[0]">
<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>

<Port Location="XS1_PORT_4C" Name="PORT_LEDS"/>
<Port Location="XS1_PORT_4D" Name="PORT_BUTTONS"/>

<Port Location="XS1_PORT_1I" Name="WIFI_WIRQ"/>
<Port Location="XS1_PORT_1J" Name="WIFI_MOSI"/>
<Port Location="XS1_PORT_4E" Name="WIFI_WUP_RST_N"/>
<Port Location="XS1_PORT_4F" Name="WIFI_CS_N"/>
<Port Location="XS1_PORT_1L" Name="WIFI_CLK"/>
<Port Location="XS1_PORT_1M" Name="WIFI_MISO"/>
</Tile>
<Tile Number="1" Reference="tile[1]">
<!-- Mic related ports -->
<Port Location="XS1_PORT_1G" Name="PORT_PDM_CLK"/>
<Port Location="XS1_PORT_1F" Name="PORT_PDM_DATA"/>

<!-- Audio ports -->
<Port Location="XS1_PORT_1D" Name="PORT_MCLK_IN"/>
<Port Location="XS1_PORT_1C" Name="PORT_I2S_BCLK"/>
<Port Location="XS1_PORT_1B" Name="PORT_I2S_LRCLK"/>
<Port Location="XS1_PORT_1A" Name="PORT_I2S_DAC_DATA"/>
<Port Location="XS1_PORT_1N" Name="PORT_I2S_ADC_DATA"/>
<Port Location="XS1_PORT_4A" Name="PORT_CODEC_RST_N"/>
</Tile>
</Node>
</Nodes>
</Package>
</Packages>
<Nodes>
<Node Id="2" Type="device:" RoutingId="0x8000">
<Service Id="0" Proto="xscope_host_data(chanend c);">
<Chanend Identifier="c" end="3"/>
</Service>
</Node>
</Nodes>
<Links>
<Link Encoding="2wire" Delays="5clk" Flags="XSCOPE">
<LinkEndpoint NodeId="0" Link="XL0"/>
<LinkEndpoint NodeId="2" Chanend="1"/>
</Link>
</Links>
<ExternalDevices>
<Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K" PageSize="256" SectorSize="4096" NumPages="16384">
<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
<Attribute Name="QE_REGISTER" Value="flash_qe_location_status_reg_0"/>
<Attribute Name="QE_BIT" Value="flash_qe_bit_6"/>
</Device>
</ExternalDevices>
<JTAGChain>
<JTAGDevice NodeId="0"/>
</JTAGChain>

</Network>
23 changes: 23 additions & 0 deletions app_integration_tests/src/config.xscope
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<?xml version="1.0" encoding="UTF-8"?>

<!-- ======================================================= -->
<!-- The 'ioMode' attribute on the xSCOPEconfig -->
<!-- element can take the following values: -->
<!-- "none", "basic", "timed" -->
<!-- -->
<!-- The 'type' attribute on Probe -->
<!-- elements can take the following values: -->
<!-- "STARTSTOP", "CONTINUOUS", "DISCRETE", "STATEMACHINE" -->
<!-- -->
<!-- The 'datatype' attribute on Probe -->
<!-- elements can take the following values: -->
<!-- "NONE", "UINT", "INT", "FLOAT" -->
<!-- ======================================================= -->

<xSCOPEconfig ioMode="basic" enabled="true">

<!-- For example: -->
<!-- <Probe name="Probe Name" type="CONTINUOUS" datatype="UINT" units="Value" enabled="true"/> -->
<!-- From the target code, call: xscope_int(PROBE_NAME, value); -->

</xSCOPEconfig>
174 changes: 174 additions & 0 deletions app_integration_tests/src/main.xc
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// Copyright (c) 2020, XMOS Ltd, All rights reserved

#include <platform.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <xscope.h>
#include <xclib.h>
#include <stdint.h>
#include "spi.h"
#include "spibuffer.h"
#include "aiengine.h"
#include "aisrv.h"
#include "inference_engine.h"
#include "server_memory.h"

#include "xud.h"

#define EP_COUNT_OUT 2
#define EP_COUNT_IN 2

XUD_EpType epTypeTableOut[EP_COUNT_OUT] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_BUL};
XUD_EpType epTypeTableIn[EP_COUNT_IN] = {XUD_EPTYPE_CTL | XUD_STATUS_ENABLE, XUD_EPTYPE_BUL};

#if defined(PSOC_INTEGRATION)
on tile[1]: in port p_cs_s = XS1_PORT_1A;//DAC_DATA
on tile[1]: in port p_clk_s = XS1_PORT_1B;//LRCLK
on tile[1]: buffered port:32 p_mosi_s = XS1_PORT_1C; //BCLK
on tile[1]: buffered port:32 p_miso_s = XS1_PORT_1P;
on tile[1]: out port reset1 = XS1_PORT_4A;
on tile[1]: clock clkblk_s = XS1_CLKBLK_4;
#endif


#define FL_QUADDEVICE_MACRONIX_MX25R6435FM2IH0 \
{ \
16, /* MX25R6435FM2IH0 */ \
256, /* page size */ \
32768, /* num pages */ \
3, /* address size */ \
3, /* log2 clock divider */ \
0x9F, /* QSPI_RDID */ \
0, /* id dummy bytes */ \
3, /* id size in bytes */ \
0xC22817, /* device id */ \
0x20, /* QSPI_SE */ \
4096, /* Sector erase is always 4KB */ \
0x06, /* QSPI_WREN */ \
0x04, /* QSPI_WRDI */ \
PROT_TYPE_NONE, /* no protection */ \
{{0,0},{0x00,0x00}}, /* QSPI_SP, QSPI_SU */ \
0x02, /* QSPI_PP */ \
0xEB, /* QSPI_READ_FAST */ \
1, /* 1 read dummy byte */ \
SECTOR_LAYOUT_REGULAR, /* mad sectors */ \
{4096,{0,{0}}}, /* regular sector sizes */ \
0x05, /* QSPI_RDSR */ \
0x01, /* QSPI_WRSR */ \
0x01, /* QSPI_WIP_BIT_MASK */ \
}

#define FL_QUADDEVICE_MACRONIX_MX25R3235FM1IH0 \
{ \
15, /* MX25R3235FM1IH0 */ \
256, /* page size */ \
32768, /* num pages */ \
3, /* address size */ \
3, /* log2 clock divider */ \
0x9F, /* QSPI_RDID */ \
0, /* id dummy bytes */ \
3, /* id size in bytes */ \
0xC22816, /* device id */ \
0x20, /* QSPI_SE */ \
4096, /* Sector erase is always 4KB */ \
0x06, /* QSPI_WREN */ \
0x04, /* QSPI_WRDI */ \
PROT_TYPE_NONE, /* no protection */ \
{{0,0},{0x00,0x00}}, /* QSPI_SP, QSPI_SU */ \
0x02, /* QSPI_PP */ \
0xEB, /* QSPI_READ_FAST */ \
1, /* 1 read dummy byte */ \
SECTOR_LAYOUT_REGULAR, /* mad sectors */ \
{4096,{0,{0}}}, /* regular sector sizes */ \
0x05, /* QSPI_RDSR */ \
0x01, /* QSPI_WRSR */ \
0x01, /* QSPI_WIP_BIT_MASK */ \
}

fl_QuadDeviceSpec flash_spec[] = {
FL_QUADDEVICE_MACRONIX_MX25R6435FM2IH0,
FL_QUADDEVICE_MACRONIX_MX25R3235FM1IH0
};

on tile[0]: fl_QSPIPorts qspi = {
PORT_SQI_CS,
PORT_SQI_SCLK,
PORT_SQI_SIO,
XS1_CLKBLK_2
};

int main(void)
{
chan c_usb_to_engine[2];
chan c_usb_ep0_dat;
chan c_flash[2];
chan c_ep_out[EP_COUNT_OUT], c_ep_in[EP_COUNT_IN];

par
{

on tile[0]: {
inference_engine_t ie;
unsafe { inference_engine_initialize_with_memory_1(&ie); }
aiengine(ie, c_usb_to_engine[0], null, null,
null, null, c_flash[1]
);
}

on tile[1]: {
// inference_engine_t ie;
// unsafe { inference_engine_initialize_with_memory_0(&ie); }
// aiengine(ie, c_usb_to_engine[0], null, null,
// null, null, c_flash[0]
// );
}

on tile[0]: {
//flash_t headers[2];
//flash_server(c_flash, headers, 2, qspi, flash_spec, sizeof(flash_spec) / sizeof(flash_spec[0]));
}

#if defined(PSOC_INTEGRATION)
on tile[1]: {
unsafe {
struct memory memory;
struct memory * unsafe mem = & memory;
mem->status[0] = 0x00000080;
mem->input_tensor_index = 0;
mem->input_tensor_length = 0;
mem->output_tensor_index = 0;
mem->output_tensor_length = 0;
mem->timings_index = 10; // TODO FIXME this hardcored value needs to relate to model
mem->timings_length = 31; // TODO FIXME as above
mem->model_index = 0;
mem->debug_log_index = 134; // TODO FIXME
mem->debug_log_length = (MAX_DEBUG_LOG_LENGTH * MAX_DEBUG_LOG_ENTRIES);
mem->ai_server_id[0] = INFERENCE_ENGINE_ID;
reset1 <: 0;
par {
spi_xcore_ai_slave(p_cs_s, p_clk_s,
p_miso_s, p_mosi_s,
clkblk_s, c_led, c_spi_to_buffer,
mem);
spi_buffer(c_spi_to_buffer, c_spi_to_engine,
c_acquire_to_buffer, mem);
}
}
}
#endif

on USB_TILE :
{
par
{
aisrv_usb_data(c_ep_out[1], c_ep_in[1], c_usb_to_engine, c_usb_ep0_dat);
aisrv_usb_ep0(c_ep_out[0], c_ep_in[0], c_usb_ep0_dat);
XUD_Main(c_ep_out, EP_COUNT_OUT, c_ep_in, EP_COUNT_IN, null, epTypeTableOut, epTypeTableIn, XUD_SPEED_HS, XUD_PWR_BUS);

}
}

}
return 0;
}
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