cd tegra2_qemu
mkdir build && cd build
../configure --target-list=aarch64-softmmu,arm-softmmu --enable-gcrypt
make # Or ninjagcrypt is required for using raw RSA messages.
./qemu-system-arm -M tegra2-qemu -m 1024 -kernel arch/arm/boot/zImage -dtb arch/arm/boot/dts/tegra20-qemu.dtb --append "earlyprintk=1 console=ttyS0" -serial stdio -net nic,model=lan9118 -net user -device usb-tablet -device usb-kbd- Specify SD card image path with
-drive if=sd,file=sd.img. See QEMU help for the rest of standard cmdline arguments. - Specify bootloader image path using
-bootloaderargument (optional). - Specify IRAM image path using
-iramargument (optional). - Kernel image is loaded at fixed address 0x1000000. DTB is appended to the kernel.
Kernel and device-tree are available at https://github.com/grate-driver/linux.
U-Boot is available at https://github.com/grate-driver/u-boot, use qemu_tegra2_defconfig.
./qemu-system-aarch64 -machine tegrax1 -m 4G -bootloader {BPMP IRAM bootloader path}Actual GPU rendering will not be supported. Playing commercial titles with graphics display requires GPU rendering.
- Use
-machine tegrax1plusfor TX1+. -bios {path}can also be used for running the BPMP IROM. The IROM must be unpatched (all IPATCH slots disabled), since IPATCH patching is emulated. If neither are specified, CCPLEX core0 is started in EL3. It's assumed the user loaded the required data, such as with (repeating as needed for each file):-device loader,addr={value},{force-raw=true},file={path}. To set the reset vector for this:-global driver=tegra.evp,property=cpu-reset-vector,value={addr}.- To override the addr jumped to by the BPMP reset vector:
-global driver=tegra.evp,property=bpmp-reset-vector,value={addr}cold-bpmp-reset-vectoris used for cold (non-guest) reset,bpmp-reset-vectoris used for guest-reset. This can used for booting the bootloader originally from emmc, for example for tegrax1plus:... -machine tegrax1plus ... -bootloader {bootloader path} ... -device loader,addr=0x40000464,force-raw=true,file={decrypted BCT} -device loader,addr=0x400002F8,data-len=4,data=0x1 -device loader,addr=0x04000000C,data-len=4,data=0x1 -global driver=tegra.evp,property=cold-bpmp-reset-vector,value=0x40010040Adjust reset vector as needed. Additionally, if the ipatch which overrides APB_MISC_PP_STRAPPING_OPT_A_0 is being used the following should be used (needed for warmboot):-global driver=tegra.pmc,property=cold-reset-regs,value=0xB14:0x1C00(sets the scratch reg used by the ipatch for APB_MISC_PP_STRAPPING_OPT_A_0, this is only needed since IROM wasn't ran for cold-boot) - To configure the value of PMC registers during cold-boot (non-guest-reset), repeating as needed for each register:
-global driver=tegra.pmc,property=cold-reset-regs,value={pmc_reg_offset}:{reg_value} - To load both IROM and bootloader with BPMP reset for bootloader, while supporting running IROM later for warmboot: `` -bios {path} -bootloader {path} global driver=tegra.evp,property=cold-bpmp-reset-vector,value=0x40010000`` Adjust reset vector as needed. Note that running IROM directly to load bootloader via PMC regs configured above may be preferred, so that various regs are configured properly by IROM.
- The sd -drive index 0-3 corresponds to the SDMMC1-SDMMC4 controllers. To (optionally) attach storage to each controller:
-drive if=sd,index={0-3},format=raw,file={image path} - Use index=3 for emmc, and (for example) 0 for sd. The emmc image must start with the 0x400000-byte BOOT0 and BOOT1 partitions, with the main MMC partition following that at byte-offset 0x800000.
- Each input
-serialargument corresponds to UART-A - UART-D. If UART-A output with stdio instead of the default is wanted, this can be used for example:-chardev stdio,id=char0 -serial chardev:char0 - The fuse-cache can be specified via an input secret. End-of-file == end of fuse regs. Loading cache regs from iopage is also supported. To set fuse-cache:
-object secret,id=tegra.fuse.cache,file={path}To set the fuse-array (size must be <=0x400-bytes):-object secret,id=tegra.fuse.array,file={path}The fuse-array is loaded after the fuse-cache, this is skipped for guest-reset. For guest-reset, the current fuse-array data for ODM is loaded into fuse-cache. - SE AES keys can optionally be specified via input secrets if needed. Repeat as needed for each keyslot:
-object secret,id=se.aeskeyslot{decimal keyslot 0-15},file={path to raw keydata}Size should be 0x10-0x20 for AES-128 - AES-256. If the size is 0x40, when an AES operation is done with a single block with this keyslot the input is compared with the data previously loaded from +0x20 in this file. When it matches, the data at +0x30 overrides the AES output with actual crypto being skipped. Note that this doesn't check the current keydata being used. - To configure SE AES keyslot locking, repeating as needed for each keyslot:
-global driver=tegra.se,property=aes-keyslots-lock,value={keyslot}:{value}This is masked with the SE_CRYPTO_KEYTABLE_ACCESS registers when checking access control, the prop value is not exposed to the guest via SE_CRYPTO_KEYTABLE_ACCESS. For example, to force block writes to the key so that only the keydata loaded during reset is used (such as from loaded secrets):value={keyslot}:0xfd - The TSEC outdata can optionally be configured with (size <=0x10-bytes):
-object secret,id=tegra.tsec.outdata,file={path}The key used by tsec for PK11 decryption can be set with (should not be used if PK11-decryption isn't used):-object secret,id=tegra.tsec.package1_key,file={path}tegra.tsec.outdata is also used to set the tsec_key SE keyslot during a TSEC operation. To set the tsec_root_key SE keyslot during a TSEC operation (size <=0x10-bytes):-object secret,id=tegra.tsec.tsec_root_key,file={path} - The FEKs (Fuse Encryption Key) for TX1+ can optionally be specified via input secrets if needed. Repeat as needed for each key:
-object secret,id=tegra.apb_misc.{prod|dev}_fek{decimal slot 0-7},file={path to raw keydata} - To configure IPATCH regs during cold-boot (non-guest-reset), repeating as needed for each register:
-global driver=tegra.sb,property=cold-reset-ipatches,value={ipatch_id}:{reg_value}This is for using custom ipatches with the BPMP IROM, so the id should be different from what the IROM loads. reg_value lower 16bits is the data-value, while the upper 16bits isoffset>>1. - To resume after sleep-mode is entered via the PMC reg, use
system_wakeupvia the QEMU monitor. This is only available when tegra.evp bpmp-reset-vector is left at the default, and when-biosis specified. - To rotate the display:
-global driver=tegra.dc,property=rotate,value={0/90/180/270}Note that -rotate is not used for this since that also enables rotating the host mouse input. - To configure the value of register APB_MISC_PP_STRAPPING_OPT_A_0 (default is setup for booting from emmc):
-global driver=tegra.apb_misc,property=pp-strapping-opt-a,value={value} - To configure the reset value of GPIO_IN for each bank/port (each bit corresponds to a GPIO pin):
-global driver=tegra.gpio,property=reset-value-bank{0-7}-port{0-3},value={value}This defaults to 0, so make sure to set this as required for your machine (buttons etc).
See also QEMU docs regarding secrets input / cmdline arguments.
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QEMU is capable of emulating a complete machine in software without any need for hardware virtualization support. By using dynamic translation, it achieves very good performance. QEMU can also integrate with the Xen and KVM hypervisors to provide emulated hardware while allowing the hypervisor to manage the CPU. With hypervisor support, QEMU can achieve near native performance for CPUs. When QEMU emulates CPUs directly it is capable of running operating systems made for one machine (e.g. an ARMv7 board) on a different machine (e.g. an x86_64 PC board).
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QEMU is multi-platform software intended to be buildable on all modern Linux platforms, OS-X, Win32 (via the Mingw64 toolchain) and a variety of other UNIX targets. The simple steps to build QEMU are:
mkdir build
cd build
../configure
makeAdditional information can also be found online via the QEMU website:
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git clone https://gitlab.com/qemu-project/qemu.gitWhen submitting patches, one common approach is to use 'git format-patch' and/or 'git send-email' to format & send the mail to the [email protected] mailing list. All patches submitted must contain a 'Signed-off-by' line from the author. Patches should follow the guidelines set out in the style section of the Developers Guide.
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For installation instructions, please go to
The workflow with 'git-publish' is:
$ git checkout master -b my-feature
$ # work on new commits, add your 'Signed-off-by' lines to each
$ git publishYour patch series will be sent and tagged as my-feature-v1 if you need to refer back to it in the future.
Sending v2:
$ git checkout my-feature # same topic branch
$ # making changes to the commits (using 'git rebase', for example)
$ git publishYour patch series will be sent with 'v2' tag in the subject and the git tip will be tagged as my-feature-v2.
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