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Some of my Verilog projects

Some of my recent verilog projects are included here. Main one I was working with is the AES Encryption/Decryption implementation. Sorry the folder naming is all messed up, I needed to use a git-less computer for lab at school so the only way to transfer the latest files was the old-fashioned USB.

Most Recent Folder: AES_1205_3

# To run testbenches
./aes_compile.sh

# To see output on Gtkwave
./aes_compile.sh
gtkwave fpga_top_tb.vcd

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