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dts: arm: st: add SMBus devices
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Add SMBus devices to all SoCs which have either
a st,stm32-i2c-v1 or st,stm32-i2c-v2.

Signed-off-by: Benedikt Schmidt <[email protected]>
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benediktibk committed Dec 7, 2023
1 parent 313f13a commit 74bc41a
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Showing 42 changed files with 576 additions and 0 deletions.
8 changes: 8 additions & 0 deletions dts/arm/st/c0/stm32c0.dtsi
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Expand Up @@ -343,6 +343,14 @@
io-channels = <&adc1 10>;
status = "disabled";
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/f0/stm32f0.dtsi
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Expand Up @@ -364,6 +364,14 @@
io-channels = <&adc1 17>;
status = "disabled";
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/f0/stm32f030X8.dtsi
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Expand Up @@ -77,4 +77,12 @@
};
};
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/f0/stm32f051.dtsi
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Expand Up @@ -77,4 +77,12 @@
#io-channel-cells = <1>;
};
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/f0/stm32f070Xb.dtsi
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Expand Up @@ -87,4 +87,12 @@
status = "disabled";
};
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};
16 changes: 16 additions & 0 deletions dts/arm/st/f1/stm32f1.dtsi
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Expand Up @@ -362,6 +362,22 @@
v25 = <1430>;
ntc;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};

&nvic {
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24 changes: 24 additions & 0 deletions dts/arm/st/f2/stm32f2.dtsi
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Expand Up @@ -713,6 +713,30 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/f3/stm32f3.dtsi
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Expand Up @@ -463,6 +463,14 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};
};

&nvic {
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16 changes: 16 additions & 0 deletions dts/arm/st/f3/stm32f302.dtsi
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Expand Up @@ -117,4 +117,20 @@
st,adc-sequencer = <FULLY_CONFIGURABLE>;
};
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/f3/stm32f303.dtsi
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Expand Up @@ -172,4 +172,12 @@
st,adc-sequencer = <FULLY_CONFIGURABLE>;
};
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/f3/stm32f373.dtsi
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Expand Up @@ -212,4 +212,12 @@
vbat: vbat {
io-channels = <&adc1 18>;
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};
24 changes: 24 additions & 0 deletions dts/arm/st/f4/stm32f4.dtsi
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Expand Up @@ -599,6 +599,30 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};

&nvic {
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24 changes: 24 additions & 0 deletions dts/arm/st/f7/stm32f7.dtsi
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Expand Up @@ -882,6 +882,30 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/f7/stm32f745.dtsi
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Expand Up @@ -88,4 +88,12 @@
status = "disabled";
};
};

smbus4: smbus4 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c4>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/f7/stm32f765.dtsi
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Expand Up @@ -91,4 +91,12 @@
};

};

smbus4: smbus4 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c4>;
status = "disabled";
};
};
16 changes: 16 additions & 0 deletions dts/arm/st/g0/stm32g0.dtsi
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Expand Up @@ -460,6 +460,22 @@
io-channels = <&adc1 14>;
status = "disabled";
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/g0/stm32g0b0.dtsi
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Expand Up @@ -110,4 +110,12 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};
8 changes: 8 additions & 0 deletions dts/arm/st/g0/stm32g0b1.dtsi
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Expand Up @@ -143,4 +143,12 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};
24 changes: 24 additions & 0 deletions dts/arm/st/g4/stm32g4.dtsi
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Expand Up @@ -691,6 +691,30 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};

smbus3: smbus3 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c3>;
status = "disabled";
};
};

&nvic {
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8 changes: 8 additions & 0 deletions dts/arm/st/g4/stm32g473.dtsi
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Expand Up @@ -108,4 +108,12 @@
status = "disabled";
};
};

smbus4: smbus4 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c4>;
status = "disabled";
};
};
16 changes: 16 additions & 0 deletions dts/arm/st/h5/stm32h5.dtsi
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Expand Up @@ -536,6 +536,22 @@
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

smbus1: smbus1 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c1>;
status = "disabled";
};

smbus2: smbus2 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c2>;
status = "disabled";
};
};

&nvic {
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