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board: m5stack-core2 module support #61812

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12 changes: 12 additions & 0 deletions boards/xtensa/m5stack_core2/Kconfig.board
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# M5Stack Core2 board configuration

# Copyright (c) 2023 Martin Kiepfer <[email protected]>
# SPDX-License-Identifier: Apache-2.0

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config BOARD_M5STACK_CORE2
bool "M5Stack Core2 Development Board"
depends on SOC_SERIES_ESP32

choice SOC_PART_NUMBER
default SOC_ESP32_D0WD_V3
endchoice
51 changes: 51 additions & 0 deletions boards/xtensa/m5stack_core2/Kconfig.defconfig
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# M5Stack Core2 board configuration
# Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem)
# Copyright (c) 2023 Martin Kiepfer <[email protected]>
# SPDX-License-Identifier: Apache-2.0

if BOARD_M5STACK_CORE2

config BOARD
default "m5stack_core2"
depends on BOARD_M5STACK_CORE2

config ENTROPY_GENERATOR
default y

config HEAP_MEM_POOL_SIZE
default 98304 if WIFI
default 65536 if BT
default 4096

config KERNEL_MEM_POOL
default y

choice BT_HCI_BUS_TYPE
default BT_ESP32 if BT
endchoice

config MFD_INIT_PRIORITY
default 60

config REGULATOR_AXP192_INIT_PRIORITY
default 76

config GPIO_AXP192_INIT_PRIORITY
default 80

config GPIO_HOGS_INIT_PRIORITY
default 81

config INPUT_FT5336_INTERRUPT
default y if INPUT

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config KSCAN
default y if DISPLAY

config INPUT
default y if KSCAN

config LV_COLOR_16_SWAP
default y if LVGL

endif # BOARD_M5STACK_CORE2
9 changes: 9 additions & 0 deletions boards/xtensa/m5stack_core2/board.cmake
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# SPDX-License-Identifier: Apache-2.0

if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
set(OPENOCD OPENOCD-NOTFOUND)
endif()
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)

include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
Binary file not shown.
194 changes: 194 additions & 0 deletions boards/xtensa/m5stack_core2/doc/index.rst
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.. _m5stack_core2:

M5Stack Core2
#############

Overview
********

M5Stack Core2 is an ESP32-based development board from M5Stack. It is the successor for the Core module.

M5Stack Core2 features the following integrated components:

- ESP32-D0WDQ6-V3 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
- PSRAM 8MB
- Flash 16MB
- LCD IPS TFT 2", 320x240 px screen (ILI9342C)
- Touch screen (FT6336U)
- PMU AXP192
- Audio NS4168 amplifier (1W-092 speaker)
- Vibration motor
- RTC BM8563
- USB CP2104
- SD-Card slot
- IMO 6-axis IMU MPU6886
- MIC SPM1423
- Battery 390mAh 3,7V

.. figure:: img/m5stack_core2.webp
:align: center
:alt: M5Stack-Core2
:width: 400 px

M5Stack-Core2 module

Functional Description
**********************

The following table below describes the key components, interfaces, and controls
of the M5Stack Core2 board.

.. _M5Core2 Schematic: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/schematic/Core/CORE2_V1.0_SCH.pdf
.. _MPU-ESP32: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/esp32_datasheet_en_v3.9.pdf
.. _TOUCH-FT6336U: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/Ft6336GU_Firmware%20外部寄存器_20151112-%20EN.xlsx
.. _SND-NS4168: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/NS4168_CN_datasheet.pdf
.. _MPU-6886: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/MPU-6886-000193%2Bv1.1_GHIC_en.pdf
.. _LCD-ILI9342C: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/ILI9342C-ILITEK.pdf
.. _SPM-1423: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SPM1423HM4H-B_datasheet_en.pdf
.. _RTC-BM8563: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/BM8563_V1.1_cn.pdf
.. _SY7088: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/SY7088-Silergy.pdf
.. _PMU-AXP192: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/AXP192_datasheet_en.pdf
.. _VIB-1072_RFN01: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/1027RFN01-33d.pdf

+------------------+--------------------------------------------------------------------------+
| Key Component | Description |
+==================+==========================================================================+
|| ESP32-D0WDQ6-V2 || This `MPU-ESP32`_ module provides complete Wi-Fi and Bluetooth |
|| module || functionalities and integrates a 16-MB SPI flash. |
+------------------+--------------------------------------------------------------------------+
|| 32.768 kHz RTC || External precision 32.768 kHz crystal oscillator serves as a clock with |
|| || low-power consumption while the chip is in Deep-sleep mode. |
+------------------+--------------------------------------------------------------------------+
| Status LED | One user LED connected to the GPIO pin. |
+------------------+--------------------------------------------------------------------------+
|| USB Port || USB interface. Power supply for the board as well as the |
|| || communication interface between a computer and the board. |
|| || Contains: TypeC x 1, GROVE(I2C+I/O+UART) x 1 |
+------------------+--------------------------------------------------------------------------+
| Reset button | Reset button |
+------------------+--------------------------------------------------------------------------+
| Power Switch | Power on/off button. |
+------------------+--------------------------------------------------------------------------+
|| LCD screen || Built-in LCD TFT display \(`LCD-ILI9342C`_, 2", 320x240 px\) |
|| || controlled via SPI interface |
+------------------+--------------------------------------------------------------------------+
|| 3-axis || The `MPU-6886`_ is a 6-axis MotionTracking device that combines a |
|| gyrosopce || 3-axis gyroscope and a 3-axis accelerometer. |
+------------------+--------------------------------------------------------------------------+
|| Built-in || The `SPM-1423`_ I2S driven microphone. |
|| microphone || |
+------------------+--------------------------------------------------------------------------+
| Built-in speaker | 1W speaker for audio output via I2S interface. |
+------------------+--------------------------------------------------------------------------+

Supported Features
==================

The Zephyr m5stack_core2 board configuration supports the following hardware features:

+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtc |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | independent watchdog |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| DAC | on-chip | dac |
+-----------+------------+-------------------------------------+
| die-temp | on-chip | die temperature sensor |
+-----------+------------+-------------------------------------+


Start Application Development
*****************************

Before powering up your M5Stack Core2, please make sure that the board is in good
condition with no obvious signs of damage.

System requirements
===================

Prerequisites
-------------

Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
below to retrieve those files.

.. code-block:: console

west blobs fetch hal_espressif

.. note::

It is recommended running the command above after :file:`west update`.

Building & Flashing
-------------------

Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).

.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2
:goals: build

The usual ``flash`` target will work with the ``m5stack_core2`` board
configuration. Here is an example for the :ref:`hello_world`
application.

.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: m5stack_core2
:goals: flash

The baud rate of 921600bps is set by default. If experiencing issues when flashing,
try using different values by using ``--esp-baud-rate <BAUD>`` option during
``west flash`` (e.g. ``west flash --esp-baud-rate 115200``).

You can also open the serial monitor using the following command:

.. code-block:: shell

west espressif monitor

After the board has automatically reset and booted, you should see the following
message in the monitor:

.. code-block:: console

***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! m5stack_core2

Debugging
---------

M5Stack Core2 debugging is not supported due to pinout limitations.

Related Documents
*****************

- `M5StickC PLUS schematic <https://static-cdn.m5stack.com/resource/docs/products/core/m5stickc_plus/m5stickc_plus_sch_03.webp>`_ (WEBP)
- `ESP32-PICO-D4 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf>`_ (PDF)
- `M5StickC PLUS docs <https://docs.m5stack.com/en/core/m5stickc_plus>`_
- `ESP32 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf>`_ (PDF)
- `ESP32 Hardware Reference <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/hw-reference/index.html>`_
19 changes: 19 additions & 0 deletions boards/xtensa/m5stack_core2/grove_connectors.dtsi
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/*
* Copyright (c) 2023 Joel Guittet
* Copyright (c) 2023 Martin Kiepfer
* SPDX-License-Identifier: Apache-2.0
*/

/ {
grove_header: grove_header {
compatible = "grove-header";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpio1 1 0>, /* D0/SCL/RX */
<1 0 &gpio1 0 0>; /* D1/SDA/TX */
};
};

grove_i2c: &i2c1 {};
grove_uart: &uart1 {};
73 changes: 73 additions & 0 deletions boards/xtensa/m5stack_core2/m5stack_core2-pinctrl.dtsi
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/*
* Copyright (c) 2022 AVSystem Sławomir Wolf Sp.j. (AVSystem)
* Copyright (c) 2023 Martin Kiepfer <[email protected]>
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>

&pinctrl {

uart0_tx_gpio1: uart0_tx_gpio1 {
pinmux = <UART0_TX_GPIO1>;
};

uart0_rx_gpio3: uart0_rx_gpio3 {
pinmux = <UART0_RX_GPIO3>;
bias-pull-up;
};

uart1_rx_gpio33: uart1_rx_gpio33 {
pinmux = <UART1_RX_GPIO33>;
};

uart1_tx_gpio32: uart1_tx_gpio32 {
pinmux = <UART1_TX_GPIO32>;
};

spim3_default: spim3_default {
group1 {
pinmux = <SPIM3_MISO_GPIO38>,
<SPIM3_SCLK_GPIO18>,
<SPIM3_CSEL_GPIO5>;
};
group2 {
pinmux = <SPIM3_MOSI_GPIO23>;
output-low;
};
};

spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_SCLK_GPIO6>,
<SPIM2_MISO_GPIO7>,
<SPIM2_CSEL_GPIO11>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO8>;
output-low;
};
};

i2c0_default: i2c0_default {
group1 {
pinmux = <I2C0_SDA_GPIO21>,
<I2C0_SCL_GPIO22>;
drive-open-drain;
output-high;
};
};

i2c1_default: i2c1_default {
group1 {
pinmux = <I2C1_SDA_GPIO32>,
<I2C1_SCL_GPIO33>;
drive-open-drain;
output-high;
};
};

};
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