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dma: dma_nxp_edma: fix for dynamic IRQ handling and support for per-channel PDs #82431

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dma: dma_nxp_edma: fix for dynamic IRQ handling and support for per-channel PDs #82431

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Commits on Dec 2, 2024

  1. manifest: bump up hal_nxp revision 

    Bump up hal_nxp revision to contain the changes from
PR zephyrproject-rtos#481.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
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  2. dma: dma_nxp_edma: refactor state transitioning 

    The channel state transitions are currently performed at the
beginning of each of the functions that triggers them
(e.g: edma_start(), edma_stop(), etc...).  The main issue with
this approach is the fact if there's any failures after the state
transition then the channel will be in the target state without
performing the required steps for it.

For instance, during edma_config(), if any of the functions after
the state transition (the channel_change_state() call) fails
(e.g: get_transfer_type()) fails then the state of the channel
will be CONFIGURED even if not all the required steps were performed
(e.g: setting the MUX, configuring the transfer, etc...).

To fix this, split the state transition into two steps:

	1) Check if the transition is possible.
	2) Do the transition.

First step should be done before any configurations to make sure
that we should be performing them in the first place, while the
second step should be performed after all configurations, thus
guaranteeing that all the required steps for the target state were
performed before transitioning to it.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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  3. dma: dma_nxp_edma: perform IRQ enable/disable on channel request/release 

    Commit 48b98a9 ("drivers: dma: dma_nxp_edma: disable IRQs when
not needed") moved the IRQ enable operation to edma_start() and added
an IRQ disable operation in edma_stop(). This is wrong because it breaks
the DMA API contract w.r.t dma_start() being `isr-ok` on imx8qm/imx8qxp.

As such, move the IRQ enable and disable operations in
dma_request_channel() and dma_release_channel().

Note1: managing the interrupts like this is only really needed when
dealing with interrupt controllers that have a power domain associated
with it (which is the case for irqstr on imx8qm/imx8qxp).

Note2: Zephyr has no reference count for shared interrupts so disabling
a shared interrupt without checking if someone else is using it is
dangerous.

Based on the aforementioned notes, the irq_disable() operation is only
performed if irqstr is used as an interrupt controller (which is only
the case for imx8qm/imx8qxp). Otherwise, the operation isn't needed.

Fixes zephyrproject-rtos#80573.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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  4. dma: dma_nxp_edma: make sure channel is inactive when releasing 

    Make sure that channels are inactive before releasing them.
This way, there won't be any leftover interrupts needed to be
handled when disabling IRQs.

This patch introduces a new state: CHAN_STATE_RELEASING. This is mostly
useful for the per-channel PD support in which the ISR needs to check
that the channel PD is enabled before attempting to access its register
space.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
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  5. dma: dma_nxp_edma: add support for managing per-channel PDs 

    Add support for managing per-channel power domains (1 channel,
1 PD).

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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  6. dts: xtensa: add imx8qm and imx8qxp DTSI variants 

    imx8qm and imx8qxp have a couple of differences regarding
the peripheral address spaces and how the DT nodes are
configured, which is why using a generic DTSI (nxp_imx8.dtsi)
for the both of them is not right.

One of the differences between the two, which affects Zephyr
is the fact that irqstr's address space is different. Up until
now this has been dealt with at the board level (i.e:
imx8qxp_mek_mimx8qx6_adsp.dts), which is not right as this is not
board-specific, but rather soc-specific. Additionally, this
causes the following warning during compilation:

"unit address and first address in 'reg' (0x51080000) don't
match for /interrupt-controller@510a0000"

To fix this, add two new DTSIs: nxp_imx8qm and nxp_imx8qxp.
Each board (i.e: imx8qm_mek and imx8qxp_mek) will have to include
the DTSI for their soc instead of the generic DTSI (i.e: nxp_imx8).

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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  7. dts: xtensa: nxp_imx8: move up the definition of system-controller 

    This has no address space and doesn't belong between peripheral
nodes. Move it up the DTSI for better visibility. No functional
change.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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  8. dts: xtensa: nxp_imx8: add edma power domains 

    Add power domains for EDMA0's channels 6, 7, 14, and 15.
For QM these are identified as IMX_SC_R_DMA_2_*, while
for QXP thy are identified as IMX_SC_R_DMA_0_*.

Signed-off-by: Laurentiu Mihalcea <[email protected]>
    @LaurentiuM1234
    LaurentiuM1234 committed Dec 2, 2024
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