3.5 stm32 bootloader support

dts/arm/st/f0/stm32f072.dtsi

@@ -10,6 +10,12 @@
 	soc {
 		compatible = "st,stm32f072", "st,stm32f0", "simple-bus";
 
+		rom_bootloader: rom_bootloader@0x1FFFC800 {
+			compatible = "st,stm32-bootloader";
+			reg = <0x1FFFC800 DT_SIZE_K(12)>;
+			status = "okay";
+		};
+
 		can1: can@40006400 {
 			compatible = "st,stm32-bxcan";
 			reg = <0x40006400 0x400>;

modules/hal_rpi_pico/CMakeLists.txt

@@ -56,7 +56,6 @@ if(CONFIG_HAS_RPI_PICO)
     ${rp2_common_dir}/hardware_xosc/xosc.c
     ${rp2_common_dir}/hardware_watchdog/watchdog.c
     ${rp2_common_dir}/pico_platform/platform.c
-    ${rp2_common_dir}/pico_bootrom/bootrom.c
   )
 
   zephyr_include_directories(
@@ -69,12 +68,10 @@ if(CONFIG_HAS_RPI_PICO)
     ${rp2_common_dir}/hardware_sync/include
     ${rp2_common_dir}/hardware_timer/include
     ${rp2_common_dir}/hardware_resets/include
-    ${rp2_common_dir}/pico_bootrom/include
     ${rp2040_dir}/hardware_regs/include
     ${rp2040_dir}/hardware_structs/include
     ${common_dir}/pico_base/include
     ${rp2_common_dir}/pico_platform/include
-    ${rp2_common_dir}/pico_bootrom/include
     ${CMAKE_CURRENT_LIST_DIR}
   )
 
@@ -116,6 +113,11 @@ if(CONFIG_HAS_RPI_PICO)
   zephyr_include_directories_ifdef(CONFIG_PICOSDK_USE_CLAIM
           ${rp2_common_dir}/hardware_claim/include)
 
+  zephyr_library_sources_ifdef(CONFIG_PICOSDK_USE_PICO_BOOTROM
+          ${rp2_common_dir}/pico_bootrom/bootrom.c)
+  zephyr_include_directories_ifdef(CONFIG_PICOSDK_USE_PICO_BOOTROM
+          ${rp2_common_dir}/pico_bootrom/include)
+
   # Some flash driver functions must be executed from the RAM.
   # Originally pico-sdk places them in the RW data section, so this
   # implementation does the same.

modules/hal_rpi_pico/Kconfig

@@ -49,3 +49,8 @@ config PICOSDK_USE_TIMER
 	bool
 	help
 	  Use the TIMER driver from pico-sdk
+
+config PICOSDK_USE_PICO_BOOTROM
+	bool
+	help
+	  Use the pico bootrom library from pico-sdk

soc/arm/rpi_pico/rp2/CMakeLists.txt

@@ -4,3 +4,4 @@
 zephyr_library()
 
 zephyr_library_sources(soc.c)
+zephyr_library_sources_ifdef(CONFIG_RP2_BOOTLOADER bootloader.c)

soc/arm/rpi_pico/rp2/Kconfig.soc

@@ -17,6 +17,13 @@ config RP2_REQUIRES_SECOND_STAGE_BOOT
 	bool
 	default y if FLASH_LOAD_OFFSET = 0x100
 
+
+config RP2_BOOTLOADER
+	bool
+	default y
+	depends on RETENTION_BOOT_MODE
+	select PICOSDK_USE_PICO_BOOTROM
+
 # Flash type used by the SoC. The board should select the one used.
 
 config RP2_FLASH_W25Q080

soc/arm/rpi_pico/rp2/bootloader.c

@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2024 Pete Johanson
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <zephyr/init.h>
+#include <zephyr/retention/retention.h>
+#include <zephyr/retention/bootmode.h>
+#include <pico/bootrom.h>
+
+static FUNC_NORETURN void jump_to_bootloader(void)
+{
+	uint32_t boot_led_mask = 0;
+
+#if DT_HAS_CHOSEN(zephyr_rpi_pico_boot_led)
+	boot_led_mask = BIT(DT_GPIO_PIN_BY_IDX(DT_CHOSEN(zephyr_rpi_pico_boot_led), gpios, 0));
+#endif
+
+	reset_usb_boot(boot_led_mask,0);
+
+	while (1) { }
+}
+
+static int rp2_bootloader_check_boot_init(void)
+{
+	if (bootmode_check(BOOT_MODE_TYPE_BOOTLOADER) > 0) {
+		bootmode_clear();
+		jump_to_bootloader();
+	}
+
+	return 0;
+}
+
+SYS_INIT(rp2_bootloader_check_boot_init, PRE_KERNEL_2, 0);
+

soc/arm/rpi_pico/rp2/soc.c

@@ -25,21 +25,9 @@
 #include <hardware/regs/resets.h>
 #include <hardware/clocks.h>
 #include <hardware/resets.h>
-#include <pico/bootrom.h>
 
 LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
 
-/* Overrides the weak ARM implementation:
-   Set general purpose retention register and reboot */
-void sys_arch_reboot(int type)
-{
-	if (type != 0) {
-		reset_usb_boot(0,0);
-	} else {
-		NVIC_SystemReset();
-	}
-}
-
 static int rp2040_init(void)
 {
 	reset_block(~(RESETS_RESET_IO_QSPI_BITS | RESETS_RESET_PADS_QSPI_BITS |

soc/arm/st_stm32/common/CMakeLists.txt

@@ -5,6 +5,7 @@ zephyr_sources(stm32cube_hal.c)
 zephyr_linker_sources_ifdef(CONFIG_STM32_CCM SECTIONS ccm.ld)
 
 zephyr_sources_ifdef(CONFIG_STM32_BACKUP_SRAM stm32_backup_sram.c)
+zephyr_sources_ifdef(CONFIG_STM32_BOOTLOADER stm32_bootloader.c)
 zephyr_linker_sources_ifdef(CONFIG_STM32_BACKUP_SRAM SECTIONS stm32_backup_sram.ld)
 
 zephyr_sources(soc_config.c)

soc/arm/st_stm32/common/Kconfig.soc

@@ -15,6 +15,18 @@ config STM32_BACKUP_SRAM
 	help
 	  Enable support for STM32 backup SRAM.
 
+
+DT_COMPAT_ST_STM32_BOOTLOADER := st,stm32-bootloader
+config HAS_STM32_BOOTLOADER
+	def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BOOTLOADER))
+
+config STM32_BOOTLOADER
+	bool "STM32 Bootloader Support"
+	default HAS_STM32_BOOTLOADER
+	depends on RETENTION_BOOT_MODE
+	help
+	  Enable support for jumping into the STM32 when the bootmode is set.
+
 config USE_STM32_ASSERT
 	depends on ASSERT
 	bool "STM32Cube HAL and LL drivers asserts"

soc/arm/st_stm32/common/stm32_bootloader.c

@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2020 Google LLC.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <zephyr/init.h>
+#include <zephyr/retention/retention.h>
+#include <zephyr/retention/bootmode.h>
+#include <stm32_ll_system.h>
+
+static const uint32_t bootloader = DT_REG_ADDR(DT_INST(0, st_stm32_bootloader));
+static FUNC_NORETURN void jump_to_bootloader(void)
+{
+	uint32_t i = 0;
+	void (*jmp)(void);
+
+	__disable_irq();
+
+	SysTick->CTRL = 0;
+	SysTick->LOAD = 0;
+	SysTick->VAL = 0;
+
+	for (i = 0; i < sizeof(NVIC->ICER) / sizeof(NVIC->ICER[0]); i++)
+	{
+		NVIC->ICER[i] = 0xFFFFFFFF;
+		NVIC->ICPR[i] = 0xFFFFFFFF;
+	}
+
+	LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SYSTEMFLASH);
+
+	jmp = (void (*)(void)) (void (*)(void)) (*((uint32_t *) ((bootloader + 4))));
+
+	__set_CONTROL(0);
+	__set_MSP(*(uint32_t *)bootloader);
+
+	__enable_irq();
+
+	jmp();
+
+	while (1) { }
+}
+
+static int bootloader_check_boot_init(void)
+{
+	if (bootmode_check(BOOT_MODE_TYPE_BOOTLOADER) > 0) {
+		bootmode_clear();
+		jump_to_bootloader();
+	}
+
+	return 0;
+}
+
+SYS_INIT(bootloader_check_boot_init, EARLY, 0);