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Pdm constr init deinit #185

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Sep 13, 2024
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3 changes: 2 additions & 1 deletion .github/workflows/ports_psoc6.yml
Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,8 @@ jobs:
- name: Run psoc6 tests
timeout-minutes: 12
run: |
./tests/ports/psoc6/run_psoc6_tests.sh --test-suite ci-tests --board ${{ matrix.board }} --hil ${{ runner.name }}
./tests/ports/psoc6/run_psoc6_tests.sh --test-suite pdm_pcm --board ${{ matrix.board }} --hil ${{ runner.name }}
#./tests/ports/psoc6/run_psoc6_tests.sh --test-suite ci-tests --board ${{ matrix.board }} --hil ${{ runner.name }}
- name: Container teardown
if: failure() || success()
run: |
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99 changes: 99 additions & 0 deletions docs/psoc6/quickref.rst
Original file line number Diff line number Diff line change
Expand Up @@ -579,6 +579,105 @@ Constructor
audio_in = I2S(0, sck="P5_4", ws="P5_5", sd="P5_6", mode=I2S.RX, bits=16, format=I2S.STEREO, rate=22050, ibuf=20000) # create I2S object
num_read = audio_in.readinto(buf)# fill buffer with audio samples from I2S device

PDM - PCM
------------

PDM/PCM is a asynchronous operation used to connect digital audio devices.
At the physical level, a bus consists of 2 lines: CLK, DATA.

PDM objects can be created and initialized using::

from machine import PDM_PCM
from machine import Pin

clk_pin = "P10_4"
data_pin = "P10_5"

pdm_pcm = PDM_PCM(
0,
sck=clk_pin,
data=data_pin,
sample_rate=8000,
decimation_rate=64,
bits=PDM_PCM.BITS_16,
format=PDM_PCM.STEREO,
left_gain=0,
right_gain=0
)

2 modes of operation are supported:
- blocking
- non-blocking


Constructor
-----------

.. class:: PDM_PCM(id, *, clk, data, sample_rate, decimation_rate, bits, format, left_gain, right_gain)

Construct PDM_PCM object of the given id:

- ``id`` identifies a particular PDM_PCM bus; it is board and port specific and is ignored in our port

Keyword-only parameters that are supported on this port:

- ``clk`` is a pin object for the clock line
- ``data`` is a pin object for the data line
- ``sample_rate`` specifies audio sampling rate
- ``decimation_rate`` specifies PDM decimation rate
- ``bits`` specifies word length - 16, 18, 20, 24 being accepted values
- ``format`` specifies channel format - STEREO, MONO_LEFT or MONO_RIGHT
- ``left_gain`` is PGA in 0.5 dB increment
- ``right_gain`` is PGA in 0.5 dB increment

Methods
-------

.. method:: PDM_PCM.init(clk, ...)

See constructor for argument descriptions

.. method:: PDM_PCM.deinit()

Deinitialize PDM_PCM object

.. method:: PDM_PCM.readinto(buf)

.. method:: PDM_PCM.irq(handler)

.. method:: PDM_PCM.gain(gain_left, gain_right)

Constants
---------

.. data:: PDM_PCM.STEREO

for initialising the PDM_PCM ``format`` to stereo

.. data:: PDM_PCM.MONO_LEFT

for initialising the PDM_PCM ``format`` to mono-left

.. data:: PDM_PCM.MONO_RIGHT

for initialising the PDM_PCM ``format`` to mono-right

.. data:: PDM_PCM.BITS_16

for initialising the PDM_PCM ``bits`` to 16

.. data:: PDM_PCM.BITS_18

for initialising the PDM_PCM ``bits`` to 18

.. data:: PDM_PCM.BITS_20

for initialising the PDM_PCM ``bits`` to 20

.. data:: PDM_PCM.BITS_24

for initialising the PDM_PCM ``bits`` to 24


UART
----
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1 change: 1 addition & 0 deletions ports/psoc6/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,7 @@ MOD_SRC_C += \
machine_adc.c \
machine_adcblock.c \
machine_bitstream.c\
machine_pdm_pcm.c\
\
modpsoc6.c \
psoc6_fatfs.c \
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2 changes: 1 addition & 1 deletion ports/psoc6/machine_i2s.c
Original file line number Diff line number Diff line change
Expand Up @@ -115,7 +115,7 @@ void i2s_audio_clock_init(uint32_t audio_clock_freq_hz) {
uint32_t pll_source_clock_freq_hz = cyhal_clock_get_frequency(&clock_pll);

if (audio_clock_freq_hz != pll_source_clock_freq_hz) {
mp_printf(&mp_plat_print, "machine.I2S: PLL0 freq is changed from %lu to %lu. This will affect all resources clock freq sourced by PLL0.\n", pll_source_clock_freq_hz, audio_clock_freq_hz);
mp_printf(&mp_plat_print, "machine.I2S: PLL0 freq is changed to %lu. This will affect all resources clock freq sourced by PLL0.\n", audio_clock_freq_hz);
clock_set = false;
pll_source_clock_freq_hz = audio_clock_freq_hz;
}
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