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Revert "perf: use perfUtils in
Utility (#179)"
This reverts commit f9dffb2.
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| Original file line number | Diff line number | Diff line change |
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@@ -18,7 +18,7 @@ jobs: | |
| # This workflow contains a single job called "build" | ||
| tl-test_L2: | ||
| # The type of runner that the job will run on | ||
| runs-on: ubuntu-24.04 | ||
| runs-on: ubuntu-latest | ||
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| # Steps represent a sequence of tasks that will be executed as part of the job | ||
| steps: | ||
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@@ -35,7 +35,7 @@ jobs: | |
| uses: coursier/cache-action@v5 | ||
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| - name: Verilator | ||
| run: sudo apt install verilator libsqlite3-dev | ||
| run: sudo apt install verilator | ||
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| - name: Setup Mill | ||
| uses: jodersky/[email protected] | ||
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@@ -60,7 +60,7 @@ jobs: | |
| tl-test_L2L3: | ||
| # The type of runner that the job will run on | ||
| runs-on: ubuntu-24.04 | ||
| runs-on: ubuntu-latest | ||
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| # Steps represent a sequence of tasks that will be executed as part of the job | ||
| steps: | ||
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@@ -77,7 +77,7 @@ jobs: | |
| uses: coursier/cache-action@v5 | ||
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| - name: Verilator | ||
| run: sudo apt install verilator libsqlite3-dev | ||
| run: sudo apt install verilator | ||
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| - name: Setup Mill | ||
| uses: jodersky/[email protected] | ||
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Submodule Utility
updated
9 files
Submodule rocket-chip
updated
17 files
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,122 @@ | ||
| package huancun.utils | ||
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| import chisel3._ | ||
| import huancun.HCCacheParameters | ||
| import utility.{LogPerfHelper, LogPerfIO} | ||
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| object XSPerfAccumulate { | ||
| def apply(params: HCCacheParameters, perfName: String, perfCnt: UInt) = { | ||
| if (params.enablePerf && !params.FPGAPlatform) { | ||
| val helper = Module(new LogPerfHelper) | ||
| val perfClean = helper.io.clean | ||
| val perfDump = helper.io.dump | ||
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| val counter = RegInit(0.U(64.W)) | ||
| val next_counter = counter + perfCnt | ||
| counter := Mux(perfClean, 0.U, next_counter) | ||
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| when(perfDump) { | ||
| XSPerfPrint(p"$perfName, $next_counter\n")(helper.io) | ||
| } | ||
| } | ||
| } | ||
| } | ||
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| object XSPerfHistogram { | ||
| // instead of simply accumulating counters | ||
| // this function draws a histogram | ||
| def apply( | ||
| params: HCCacheParameters, | ||
| perfName: String, | ||
| perfCnt: UInt, | ||
| enable: Bool, | ||
| start: Int, | ||
| stop: Int, | ||
| step: Int, | ||
| lStrict: Boolean = false, | ||
| rStrict: Boolean = false | ||
| ) = { | ||
| if (params.enablePerf && !params.FPGAPlatform) { | ||
| val helper = Module(new LogPerfHelper) | ||
| val perfClean = helper.io.clean | ||
| val perfDump = helper.io.dump | ||
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| // drop each perfCnt value into a bin | ||
| val nBins = (stop - start) / step | ||
| require(start >= 0) | ||
| require(stop > start) | ||
| require(nBins > 0) | ||
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| (0 until nBins).map { i => | ||
| val binRangeStart = start + i * step | ||
| val binRangeStop = start + (i + 1) * step | ||
| val inRange = perfCnt >= binRangeStart.U && perfCnt < binRangeStop.U | ||
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| // if !lStrict and perfCnt < start, it will go to the first bin | ||
| val leftOutOfRange = if(!lStrict) perfCnt < start.U && i.U === 0.U else false.B | ||
| // if !rStrict and perfCnt >= stop, it will go to the last bin | ||
| val rightOutOfRange = if(!rStrict) perfCnt >= stop.U && i.U === (nBins - 1).U else false.B | ||
| val inc = inRange || leftOutOfRange || rightOutOfRange | ||
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| val counter = RegInit(0.U(64.W)) | ||
| when(perfClean) { | ||
| counter := 0.U | ||
| }.elsewhen(enable && inc) { | ||
| counter := counter + 1.U | ||
| } | ||
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| when(perfDump) { | ||
| XSPerfPrint(p"${perfName}_${binRangeStart}_${binRangeStop}, $counter\n")(helper.io) | ||
| } | ||
| } | ||
| } | ||
| } | ||
| } | ||
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| object XSPerfMax { | ||
| def apply(params: HCCacheParameters, perfName: String, perfCnt: UInt, enable: Bool) = { | ||
| if (params.enablePerf && !params.FPGAPlatform) { | ||
| val helper = Module(new LogPerfHelper) | ||
| val perfClean = helper.io.clean | ||
| val perfDump = helper.io.dump | ||
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| val max = RegInit(0.U(64.W)) | ||
| val next_max = Mux(enable && (perfCnt > max), perfCnt, max) | ||
| max := Mux(perfClean, 0.U, next_max) | ||
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| when(perfDump) { | ||
| XSPerfPrint(p"${perfName}_max, $next_max\n")(helper.io) | ||
| } | ||
| } | ||
| } | ||
| } | ||
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| object TransactionLatencyCounter { | ||
| // count the latency between start signal and stop signal | ||
| // whenever stop signals comes, we create a latency sample | ||
| def apply(start: Bool, stop: Bool): (Bool, UInt) = { | ||
| assert(!(start && stop)) | ||
| val counter = RegInit(0.U(64.W)) | ||
| val next_counter = counter + 1.U | ||
| counter := Mux(start || stop, 0.U, next_counter) | ||
| (stop, next_counter) | ||
| } | ||
| } | ||
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| object XSPerfPrint { | ||
| def apply(fmt: String, data: Bits*)(ctrlInfo: LogPerfIO): Any = | ||
| apply(Printable.pack(fmt, data: _*))(ctrlInfo) | ||
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| def apply(pable: Printable)(ctrlInfo: LogPerfIO): Any = { | ||
| val commonInfo = p"[PERF ][time=${ctrlInfo.timer}] __PERCENTAGE_M__: " | ||
| printf(commonInfo + pable) | ||
| } | ||
| } | ||
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| object GTimer { | ||
| def apply() = { | ||
| val c = RegInit(0.U(64.W)) | ||
| c := c + 1.U | ||
| c | ||
| } | ||
| } |
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