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@OpenXiangShan

XiangShan

Open-source high-performance RISC-V processor

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  1. XiangShan XiangShan Public

    Open-source high-performance RISC-V processor

    Scala 5k 673

  2. XiangShan-doc XiangShan-doc Public

    Documentation for XiangShan

    TeX 356 136

  3. HuanCun HuanCun Public

    Open-source high-performance non-blocking cache

    Scala 69 34

  4. fudian fudian Public

    Open source high performance IEEE-754 floating unit

    Scala 62 24

  5. difftest difftest Public

    Modern co-simulation framework for RISC-V CPUs

    C++ 124 69

  6. xs-env xs-env Public

    XiangShan Frontend Develop Environment

    Shell 49 48

Repositories

Showing 10 of 69 repositories
  • NEMU Public
    OpenXiangShan/NEMU’s past year of commit activity
    C 243 94 32 21 Updated Dec 18, 2024
  • XiangShan Public

    Open-source high-performance RISC-V processor

    OpenXiangShan/XiangShan’s past year of commit activity
    Scala 4,971 673 58 48 Updated Dec 18, 2024
  • riscv-isa-sim Public Forked from riscv-software-src/riscv-isa-sim

    Spike, a RISC-V ISA Simulator

    OpenXiangShan/riscv-isa-sim’s past year of commit activity
    C 6 887 0 1 Updated Dec 18, 2024
  • GEM5 Public
    OpenXiangShan/GEM5’s past year of commit activity
    C++ 69 BSD-3-Clause 28 13 10 Updated Dec 18, 2024
  • Deterload Public

    Xiangshan deterministic workloads generator

    OpenXiangShan/Deterload’s past year of commit activity
    Nix 10 MulanPSL-2.0 3 2 0 Updated Dec 18, 2024
  • riscv-rootfs Public Forked from OSCPU/riscv-rootfs
    OpenXiangShan/riscv-rootfs’s past year of commit activity
    C 1 10 0 2 Updated Dec 18, 2024
  • qemu Public Forked from qemu/qemu

    Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.

    OpenXiangShan/qemu’s past year of commit activity
    C 0 5,760 0 1 Updated Dec 18, 2024
  • CoupledL2 Public

    Open-source non-blocking L2 cache

    OpenXiangShan/CoupledL2’s past year of commit activity
    Scala 34 20 0 3 Updated Dec 18, 2024
  • difftest Public

    Modern co-simulation framework for RISC-V CPUs

    OpenXiangShan/difftest’s past year of commit activity
    C++ 124 MulanPSL-2.0 68 7 8 Updated Dec 18, 2024
  • HuanCun Public

    Open-source high-performance non-blocking cache

    OpenXiangShan/HuanCun’s past year of commit activity
    Scala 69 34 2 1 Updated Dec 17, 2024
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