difftest: fix the sync timing for LR/SC (#154)

src/test/csrc/difftest/difftest.cpp

@@ -146,6 +146,16 @@ int Difftest::step() {
 
 #endif
 
+#ifdef CONFIG_DIFFTEST_LRSCEVENT
+  // sync lr/sc reg microarchitectural status to the REF
+  if (dut.lrsc.valid) {
+    struct SyncState sync;
+    sync.sc_fail = !dut.lrsc.success;
+    printf("sync: sc_fail %lu\n", sync.sc_fail);
+    proxy->uarchstatus_sync((uint64_t*)&sync);
+  }
+#endif
+
   num_commit = 0; // reset num_commit this cycle to 0
   if (dut.event.valid) {
   // interrupt has a higher priority than exception
@@ -312,15 +322,6 @@ int Difftest::do_instr_commit(int i) {
   }
 #endif
 
-#ifdef CONFIG_DIFFTEST_LRSCEVENT
-  // sync lr/sc reg microarchitectural status to the REF
-  if (dut.lrsc.valid) {
-    struct SyncState sync;
-    sync.sc_fail = !dut.lrsc.success;
-    proxy->uarchstatus_sync((uint64_t*)&sync);
-  }
-#endif
-
   bool realWen = (dut.commit[i].rfwen && dut.commit[i].wdest != 0) || (dut.commit[i].fpwen);
 
   // MMIO accessing should not be a branch or jump, just +2/+4 to get the next pc