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This repository has been archived by the owner on Jun 2, 2024. It is now read-only.

TT07 Verilog Project Template #2

TT07 Verilog Project Template

TT07 Verilog Project Template #2

Triggered via push April 19, 2024 17:47
Status Failure
Total duration 30s
Artifacts 1

gds.yaml

on: push
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gds
Process completed with exit code 1.

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GDS_logs Expired
1.81 KB