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Pull requests: YosysHQ/yosys

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Pull requests list

ast, read_verilog: ownership in AST, use C++ styles for parser and lexer
#5135 opened May 21, 2025 by widlarizer • Draft
6 tasks
Maintain port ordering for functional backend
#5133 opened May 21, 2025 by KrystalDelusion Loading…
Add association-list-based helper functions into Rosette backend
#5128 opened May 17, 2025 by gussmith23 Loading…
2 tasks
6
Disable STRIP operations when appropriate.
#5127 opened May 17, 2025 by RonxBulld Loading…
smt backend option --dump-vlogtb produces Verilator error
#5122 opened May 14, 2025 by trayres • Draft
Add state_dependent_path_declaration so that ifnone can be parsed
#5121 opened May 14, 2025 by FlinkbaumFAU Loading…
aiger: fix -map and -vmap
#5109 opened May 9, 2025 by widlarizer Loading…
2 tasks done
1
1
Update verilog_frontend.cc
#5102 opened May 7, 2025 by KrystalDelusion Loading…
opt_expr: fix shift optimization with overflowing shift amount
#5101 opened May 7, 2025 by georgerennie Loading…
2
6
rename: add -move-to-cell option in -wire mode
#5100 opened May 7, 2025 by jix Loading…
3
rtlil: enable single-bit vector wires
#5095 opened May 6, 2025 by widlarizer Loading…
8
autoname: Check for potential overflow
#5081 opened May 1, 2025 by KrystalDelusion Loading…
1
Updates to bugpoint
#5068 opened Apr 28, 2025 by KrystalDelusion Loading…
5 of 6 tasks
1
AstNode garbage collector for debugging
#5063 opened Apr 25, 2025 by widlarizer • Draft
check: promote some problems to errors by default, add -permissive
#5058 opened Apr 23, 2025 by widlarizer • Draft
3
more detailed Stat command
#5054 opened Apr 23, 2025 by suisseWalter • Draft
4
techlibs/lattice: add missing clock muxes to ECP5 block ram blackboxes
#5045 opened Apr 21, 2025 by danderson Loading…
1
1
Updating test_cell
#5024 opened Apr 15, 2025 by KrystalDelusion Loading…
7 tasks done
5
opt_clean: handle undriven and x-bit driven bits consistently
#5004 opened Apr 8, 2025 by widlarizer Loading…
3
dump: add --sorted flag
#5003 opened Apr 8, 2025 by widlarizer Loading…
1
techmap: map $alu to $fa instead of relying on extract_fa enhancement
#4997 opened Apr 7, 2025 by widlarizer Loading…
1 task
Trigger abc segfault for testing
#4963 opened Mar 26, 2025 by widlarizer • Draft
1
simplify: Skip AST_PRIMITIVE in AST_CELLARRAY
#4959 opened Mar 24, 2025 by KrystalDelusion Loading…
1
1
QuickLogic DSPv2 support
#4932 opened Mar 11, 2025 by povik • Draft
1 of 2 tasks
Derive abstract cells in top module during hierarchy
#4930 opened Mar 6, 2025 by KrystalDelusion • Draft
1
1
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