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AD35XXR: Add/update support to the AD3541R, AD3542R, AD3551R, Ad3552R #1472
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The axi_ad35xx AXI Stream input interface is not defined |
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It is supporting single SPI (Classic), dual SPI, and Quad SPI (according to the eval limitations) for the DACs AD3541R, AD3542R, AD3551R, AD3552R. Changed the regmap, the reg DAC_CUSTOM_CTRL needs to assert the MULTI_IO_MODE field to choose the SPI mode on the AXI controller. Signed-off-by: <[email protected]>
Adapted documentation for the axi_ad35xxr to include the four DACs: AD3541R, AD3542R, AD3551R, and AD3552R. Adapted AD355xR_EVB to include information about the AD3551R and AD3552R. Inserted information about the QSPI_SEL pin. Inserted MULTI_IO_MODE reg to the remap of the ad3552r. Signed-off-by: <[email protected]>
Removed axi libraries because they were substitute by axi_ad35xxr Removed evaluation board projects because they were substituted by ad35xxr_evb Signed-off-by: <[email protected]>
Please recreate commits to have: |
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initial begin | ||
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#100 reset_in = 1'b0; | ||
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// Write 8 bit SDR | ||
// Classic SPI |
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remove commented code
ad_connect axi_ad35xxr_dac/qspi_sel dac_qspi_sel | ||
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ad_connect axi_ad35xxr_dac/s_axis axi_dac_dma/m_axis | ||
#ad_connect axi_ad35xxr_dac/dma_data axi_dac_dma/m_axis_data |
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remove commented code
@@ -66,7 +66,8 @@ module axi_ad3552r #( | |||
output dac_csn, | |||
input [ 3:0] sdio_i, |
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excessive use of whitespaces
@@ -67,6 +67,7 @@ module axi_ad3552r_core #( | |||
input if_busy, | |||
input [23:0] data_read, | |||
output [23:0] data_write, | |||
output [ 1:0] multi_io_mode, |
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excessive use of whitespaces
@@ -46,6 +46,7 @@ module axi_ad3552r_if ( | |||
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input [ 7:0] address, | |||
input [23:0] data_write, | |||
input [ 1:0] multi_io_mode, |
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excessive use of whitespaces
PR Description
Developed a single IP for the AD3552R, AD3551R, AD3542R, and AD3541R parts.
This new IP has support for Single SPI (Classic), Dual SPI, and Quad SPI. It supports
changing the SPI mode during execution by setting the multi_io_mode field.
It was tested the interface file with some modifications on the tb.
Created a documentation for this new IP, and the regmap modification on the axi_ad35xxr.
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PR Checklist