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Development for the AD35xxR #1472
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Commits on Sep 6, 2024
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It is supporting dual SPI for the ad3542r Signed-off-by: <[email protected]>
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Commits on Sep 18, 2024
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ADD: support to AD3542r and increased sclk
It is supporting Single SPI (Classic), Dual SPI, and Quad SPI mode on the same bitstream. Changed the regmap, the reg DAC_CUSTOM_CTRL needs to assert the MULTI_IO_MODE field to choose the SPI mode. Increased the frequency of the sclk from 16.5Mhz to 66Mhz. Changed the AD3552r documentation to show the architecture changes. Signed-off-by: <[email protected]>
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some changes on the doc of the AD3552r Signed-off-by: <[email protected]>
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some changes on the doc of the AD3552r Signed-off-by: <[email protected]>
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Commits on Sep 25, 2024
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FIX: qspi_sel connected properly
Changed some parts of the documentation. Inserted EVAL-AD3552R documentation with some more info Signed-off-by: <[email protected]>
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Commits on Oct 30, 2024
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RM: axi_ad3552r, axi_ad3542r, ad3552r_evb, ad3542r_evb
Removed axi libraries because they were substitute by axi_ad35xxr Removed evaluation board projects because they were substituted by ad35xxr_evb Signed-off-by: <[email protected]>
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