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Generates with py3.8-3.12 Generating with py3.8-12 #81: completed by JPietrzykTUD
January 31, 2025 09:08 10s
January 31, 2025 09:08 10s
Builds on ARM Build & run on ARM #79: completed by JPietrzykTUD
January 31, 2025 09:05 13s
January 31, 2025 09:05 13s
Generates TSL for ARM Generating for ARM #80: completed by JPietrzykTUD
January 31, 2025 09:05 12s
January 31, 2025 09:05 12s
Generates TSL for x86 Generating for x86 #79: completed by JPietrzykTUD
January 31, 2025 09:05 13s
January 31, 2025 09:05 13s
Builds on x86 Builds & run on x86 #80: completed by JPietrzykTUD
January 31, 2025 09:05 12s
January 31, 2025 09:05 12s
Validate the TSL Generator Generating with py3.8-3.12 #76: Pull request #111 synchronize by JPietrzykTUD
January 31, 2025 09:01 7m 20s experimental
experimental
January 31, 2025 09:01 7m 20s
Generate the Template SIMD Library, builds it and run tests Build and test for Intel / ARM #76: Pull request #111 synchronize by JPietrzykTUD
January 31, 2025 09:01 4m 40s experimental
experimental
January 31, 2025 09:01 4m 40s
Generates TSL for x86 Generating for x86 #78: completed by JPietrzykTUD
January 24, 2025 14:40 15s
January 24, 2025 14:40 15s
Generates TSL for ARM Generating for ARM #79: completed by JPietrzykTUD
January 24, 2025 14:40 15s
January 24, 2025 14:40 15s
Builds on x86 Builds & run on x86 #79: completed by JPietrzykTUD
January 24, 2025 14:40 13s
January 24, 2025 14:40 13s
Builds on ARM Build & run on ARM #78: completed by JPietrzykTUD
January 24, 2025 14:40 13s
January 24, 2025 14:40 13s
Generates with py3.8-3.12 Generating with py3.8-12 #80: completed by JPietrzykTUD
January 24, 2025 14:38 12s
January 24, 2025 14:38 12s
Validate the TSL Generator Generating with py3.8-3.12 #75: Pull request #111 synchronize by JPietrzykTUD
January 24, 2025 14:36 2m 20s experimental
experimental
January 24, 2025 14:36 2m 20s
Generate the Template SIMD Library, builds it and run tests Build and test for Intel / ARM #75: Pull request #111 synchronize by JPietrzykTUD
January 24, 2025 14:36 4m 42s experimental
experimental
January 24, 2025 14:36 4m 42s
Generates with py3.8-3.12 Generating with py3.8-12 #79: completed by JPietrzykTUD
January 24, 2025 14:26 14s
January 24, 2025 14:26 14s
Builds on ARM Build & run on ARM #77: completed by JPietrzykTUD
January 24, 2025 14:24 16s
January 24, 2025 14:24 16s
Generates TSL for ARM Generating for ARM #78: completed by JPietrzykTUD
January 24, 2025 14:24 18s
January 24, 2025 14:24 18s
Builds on x86 Builds & run on x86 #78: completed by JPietrzykTUD
January 24, 2025 14:24 19s
January 24, 2025 14:24 19s
Generates TSL for x86 Generating for x86 #77: completed by JPietrzykTUD
January 24, 2025 14:24 15s
January 24, 2025 14:24 15s
Generate the Template SIMD Library, builds it and run tests Build and test for Intel / ARM #74: Pull request #111 synchronize by JPietrzykTUD
January 24, 2025 14:19 4m 55s experimental
experimental
January 24, 2025 14:19 4m 55s
Validate the TSL Generator Generating with py3.8-3.12 #74: Pull request #111 synchronize by JPietrzykTUD
January 24, 2025 14:19 7m 12s experimental
experimental
January 24, 2025 14:19 7m 12s
Generates TSL for ARM Generating for ARM #77: completed by JPietrzykTUD
January 13, 2025 13:26 13s
January 13, 2025 13:26 13s
Builds on ARM Build & run on ARM #76: completed by JPietrzykTUD
January 13, 2025 13:26 13s
January 13, 2025 13:26 13s
Generates TSL for x86 Generating for x86 #76: completed by JPietrzykTUD
January 13, 2025 13:26 17s
January 13, 2025 13:26 17s
Builds on x86 Builds & run on x86 #77: completed by JPietrzykTUD
January 13, 2025 13:26 15s
January 13, 2025 13:26 15s