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RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default #3899

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RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default

RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default #3899

Triggered via pull request March 20, 2024 16:00
@MabezDevMabezDev
synchronize #1310
MabezDev:direct-vectoring-by-default
Status Success
Total duration 7m 6s
Artifacts –

ci.yml

on: pull_request
esp-riscv-rt
50s
esp-riscv-rt
msrv-riscv
1m 47s
msrv-riscv
msrv-xtensa
3m 9s
msrv-xtensa
clippy-riscv
2m 7s
clippy-riscv
clippy-xtensa
3m 9s
clippy-xtensa
rustfmt
23s
rustfmt
Matrix: esp-hal
Matrix: esp-lp-hal
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