Skip to content
CI

RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default #3899

Sign in to view logs

RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default

RISCV: remove the direct-vectoring & interrupt-preemption features and enable them by default #3899

Run time

Learn about OS pricing on GitHub Actions
Job Run time
clippy-riscv
2m 7s
esp-hal (esp32c2)
1m 58s
esp-lp-hal (esp32c6)
1m 14s
esp-hal (esp32c3)
2m 15s
esp-lp-hal (esp32s2)
1m 7s
esp-riscv-rt
50s
esp-hal (esp32c6)
3m 17s
esp-lp-hal (esp32s3)
1m 15s
esp-hal (esp32h2)
2m 31s
msrv-riscv
1m 47s
esp-hal (esp32)
4m 47s
msrv-xtensa
3m 9s
esp-hal (esp32s2)
5m 24s
clippy-xtensa
3m 9s
esp-hal (esp32s3)
6m 2s
rustfmt
23s
41m 15s