Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

discard interrupt symbols from lto so that lto doesn't end up rebinding them #1327

Merged
merged 1 commit into from
Mar 21, 2024
Merged

discard interrupt symbols from lto so that lto doesn't end up rebinding them #1327

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
62 changes: 31 additions & 31 deletions esp-hal/ld/riscv/hal-defaults.x
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,35 +1,35 @@
PROVIDE(DefaultHandler = EspDefaultHandler);

PROVIDE(cpu_int_1_handler = DefaultHandler);
PROVIDE(cpu_int_2_handler = DefaultHandler);
PROVIDE(cpu_int_3_handler = DefaultHandler);
PROVIDE(cpu_int_4_handler = DefaultHandler);
PROVIDE(cpu_int_5_handler = DefaultHandler);
PROVIDE(cpu_int_6_handler = DefaultHandler);
PROVIDE(cpu_int_7_handler = DefaultHandler);
PROVIDE(cpu_int_8_handler = DefaultHandler);
PROVIDE(cpu_int_9_handler = DefaultHandler);
PROVIDE(cpu_int_10_handler = DefaultHandler);
PROVIDE(cpu_int_11_handler = DefaultHandler);
PROVIDE(cpu_int_12_handler = DefaultHandler);
PROVIDE(cpu_int_13_handler = DefaultHandler);
PROVIDE(cpu_int_14_handler = DefaultHandler);
PROVIDE(cpu_int_15_handler = DefaultHandler);
PROVIDE(cpu_int_16_handler = DefaultHandler);
PROVIDE(cpu_int_17_handler = DefaultHandler);
PROVIDE(cpu_int_18_handler = DefaultHandler);
PROVIDE(cpu_int_19_handler = DefaultHandler);
PROVIDE(cpu_int_20_handler = DefaultHandler);
PROVIDE(cpu_int_21_handler = DefaultHandler);
PROVIDE(cpu_int_22_handler = DefaultHandler);
PROVIDE(cpu_int_23_handler = DefaultHandler);
PROVIDE(cpu_int_24_handler = DefaultHandler);
PROVIDE(cpu_int_25_handler = DefaultHandler);
PROVIDE(cpu_int_26_handler = DefaultHandler);
PROVIDE(cpu_int_27_handler = DefaultHandler);
PROVIDE(cpu_int_28_handler = DefaultHandler);
PROVIDE(cpu_int_29_handler = DefaultHandler);
PROVIDE(cpu_int_30_handler = DefaultHandler);
PROVIDE(cpu_int_31_handler = DefaultHandler);
PROVIDE(interrupt1 = DefaultHandler);
PROVIDE(interrupt2 = DefaultHandler);
PROVIDE(interrupt3 = DefaultHandler);
PROVIDE(interrupt4 = DefaultHandler);
PROVIDE(interrupt5 = DefaultHandler);
PROVIDE(interrupt6 = DefaultHandler);
PROVIDE(interrupt7 = DefaultHandler);
PROVIDE(interrupt8 = DefaultHandler);
PROVIDE(interrupt9 = DefaultHandler);
PROVIDE(interrupt10 = DefaultHandler);
PROVIDE(interrupt11 = DefaultHandler);
PROVIDE(interrupt12 = DefaultHandler);
PROVIDE(interrupt13 = DefaultHandler);
PROVIDE(interrupt14 = DefaultHandler);
PROVIDE(interrupt15 = DefaultHandler);
PROVIDE(interrupt16 = DefaultHandler);
PROVIDE(interrupt17 = DefaultHandler);
PROVIDE(interrupt18 = DefaultHandler);
PROVIDE(interrupt19 = DefaultHandler);
PROVIDE(interrupt20 = DefaultHandler);
PROVIDE(interrupt21 = DefaultHandler);
PROVIDE(interrupt22 = DefaultHandler);
PROVIDE(interrupt23 = DefaultHandler);
PROVIDE(interrupt24 = DefaultHandler);
PROVIDE(interrupt25 = DefaultHandler);
PROVIDE(interrupt26 = DefaultHandler);
PROVIDE(interrupt27 = DefaultHandler);
PROVIDE(interrupt28 = DefaultHandler);
PROVIDE(interrupt29 = DefaultHandler);
PROVIDE(interrupt30 = DefaultHandler);
PROVIDE(interrupt31 = DefaultHandler);

INCLUDE "device.x"
38 changes: 19 additions & 19 deletions esp-hal/src/interrupt/riscv.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -439,119 +439,119 @@ mod vectored {

#[no_mangle]
#[ram]
unsafe fn cpu_int_1_handler(context: &mut TrapFrame) {
unsafe fn interrupt1(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt1, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_2_handler(context: &mut TrapFrame) {
unsafe fn interrupt2(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt2, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_3_handler(context: &mut TrapFrame) {
unsafe fn interrupt3(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt3, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_4_handler(context: &mut TrapFrame) {
unsafe fn interrupt4(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt4, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_5_handler(context: &mut TrapFrame) {
unsafe fn interrupt5(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt5, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_6_handler(context: &mut TrapFrame) {
unsafe fn interrupt6(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt6, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_7_handler(context: &mut TrapFrame) {
unsafe fn interrupt7(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt7, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_8_handler(context: &mut TrapFrame) {
unsafe fn interrupt8(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt8, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_9_handler(context: &mut TrapFrame) {
unsafe fn interrupt9(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt9, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_10_handler(context: &mut TrapFrame) {
unsafe fn interrupt10(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt10, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_11_handler(context: &mut TrapFrame) {
unsafe fn interrupt11(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt11, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_12_handler(context: &mut TrapFrame) {
unsafe fn interrupt12(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt12, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_13_handler(context: &mut TrapFrame) {
unsafe fn interrupt13(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt13, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_14_handler(context: &mut TrapFrame) {
unsafe fn interrupt14(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt14, context)
}

#[no_mangle]
#[ram]
unsafe fn cpu_int_15_handler(context: &mut TrapFrame) {
unsafe fn interrupt15(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt15, context)
}

#[cfg(plic)]
#[no_mangle]
#[ram]
unsafe fn cpu_int_16_handler(context: &mut TrapFrame) {
unsafe fn interrupt16(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt16, context)
}

#[cfg(plic)]
#[no_mangle]
#[ram]
unsafe fn cpu_int_17_handler(context: &mut TrapFrame) {
unsafe fn interrupt17(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt17, context)
}

#[cfg(plic)]
#[no_mangle]
#[ram]
unsafe fn cpu_int_18_handler(context: &mut TrapFrame) {
unsafe fn interrupt18(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt18, context)
}

#[cfg(plic)]
#[no_mangle]
#[ram]
unsafe fn cpu_int_19_handler(context: &mut TrapFrame) {
unsafe fn interrupt19(context: &mut TrapFrame) {
handle_interrupts(CpuInterrupt::Interrupt19, context)
}
}
Expand Down
Loading
Loading