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Changes to support rust-analyzer in a limited fashion at least #2029

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2 changes: 1 addition & 1 deletion .github/workflows/hil.yml
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,7 @@ jobs:
mkdir -p tests

# Find ELF files in the specified path and move them to 'tests'
find "hil-test/target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \
find "target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \
grep ELF | \
awk -F: '{print $1}' | \
xargs -I {} mv {} tests
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25 changes: 25 additions & 0 deletions .vscode/settings.json.example
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
{
// These are recommended settings.
// Should you wish to disable rust-analyzer, you can replace all of this with
// `"rust-analyzer.files.excludeDirs": ["."]`.
// You can also omit all this, but that will cause r-a to try
// (and after a long while, fail) initializing.
// Note that we are not telling rust-analyzer to use an embedded target.
// This results in a few pointer width related errors, but it also means r-a is able
// to cope with xtask and its dependencies.
"rust-analyzer.cargo.allTargets": false,
"rust-analyzer.cargo.targetDir": "target/rust-analyzer",
"rust-analyzer.procMacro.enable": false,
"rust-analyzer.cargo.features": [
"esp32c6",
"esp-hal/async",
"esp-hal/log",
"esp-hal-procmacros/has-lp-core",
"esp-backtrace/println",
"esp-backtrace/panic-handler",
"esp-backtrace/exception-handler",
"esp-println/uart",
"esp-println/log",
],
"editor.formatOnSave": true,
}
27 changes: 24 additions & 3 deletions Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
[workspace]
resolver = "2"
members = ["xtask"]
exclude = [
members = [
"xtask",
"esp-hal",
"esp-alloc",
"esp-backtrace",
"esp-build",
"esp-hal",
"esp-hal-embassy",
"esp-hal-procmacros",
"esp-hal-smartled",
Expand All @@ -21,7 +21,28 @@ exclude = [
"extras/esp-wifishark",
"extras/ieee802154-sniffer",
"hil-test",
]
exclude = [
"xtensa-lx",
"xtensa-lx-rt",
"xtensa-lx-rt/procmacros",
]

# https://doc.rust-lang.org/cargo/reference/profiles.html#test
# Test and bench profiles inherit from dev and release respectively.
[profile.dev]
codegen-units = 1
debug = 2
debug-assertions = true
incremental = false
opt-level = "z"
overflow-checks = true

[profile.release]
codegen-units = 1
debug = 2
debug-assertions = false
incremental = false
opt-level = 3
lto = "fat"
overflow-checks = false
4 changes: 2 additions & 2 deletions esp-lp-hal/.cargo/config.toml
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
[alias]
esp32c6 = "build --release --examples --features=esp32c6 --target riscv32imac-unknown-none-elf"
esp32s2 = "build --release --example=blinky --features=esp32s2 --target riscv32imc-unknown-none-elf"
esp32s3 = "build --release --example=blinky --features=esp32s3 --target riscv32imc-unknown-none-elf"
esp32s2 = "build --release --example=lp_blinky --features=esp32s2 --target riscv32imc-unknown-none-elf"
esp32s3 = "build --release --example=lp_blinky --features=esp32s3 --target riscv32imc-unknown-none-elf"

[build]
# target = "riscv32imc-unknown-none-elf" # ESP32-S2 + ESP32-S3
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6 changes: 3 additions & 3 deletions esp-lp-hal/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -73,15 +73,15 @@ embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"]
embedded-io = ["dep:embedded-io"]

[[example]]
name = "blinky"
name = "lp_blinky"
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Renamed because examples are now placed into the same target folder (the workspace's) regardless of the source package.

required-features = ["embedded-hal-02"]

[[example]]
name = "i2c"
name = "lp_i2c"
required-features = ["embedded-hal-02", "esp32c6"]

[[example]]
name = "uart"
name = "lp_uart"
required-features = ["embedded-hal-02", "esp32c6"]

[lints.rust]
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File renamed without changes.
File renamed without changes.
File renamed without changes.
9 changes: 0 additions & 9 deletions examples/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -80,12 +80,3 @@ embassy-generic-timers = ["embassy-time/generic-queue-8"]

opsram-2m = ["esp-hal/opsram-2m"]
psram-2m = ["esp-hal/psram-2m"]

[profile.release]
codegen-units = 1
debug = 2
debug-assertions = false
incremental = false
opt-level = 3
lto = 'fat'
overflow-checks = false
2 changes: 1 addition & 1 deletion examples/src/bin/lp_core_basic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ fn main() -> ! {

// load code to LP core
let lp_core_code =
load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/blinky");
load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_blinky");

// start LP core
lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_pin);
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3 changes: 1 addition & 2 deletions examples/src/bin/lp_core_i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,8 +40,7 @@ fn main() -> ! {
println!("lp core stopped");

// load code to LP core
let lp_core_code =
load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/i2c");
let lp_core_code = load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_i2c");

// start LP core
lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_i2c);
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2 changes: 1 addition & 1 deletion examples/src/bin/lp_core_uart.rs
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ fn main() -> ! {

// Load code to LP core:
let lp_core_code =
load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/uart");
load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_uart");

// Start LP core:
lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_uart);
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2 changes: 1 addition & 1 deletion examples/src/bin/ulp_riscv_core_basic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@ fn main() -> ! {

// load code to LP core
let lp_core_code =
load_lp_code!("../esp-lp-hal/target/riscv32imc-unknown-none-elf/release/examples/blinky");
load_lp_code!("target/riscv32imc-unknown-none-elf/release/examples/lp_blinky");

// start LP core
lp_core_code.run(&mut ulp_core, ulp_core::UlpCoreWakeupSource::HpCpu, pin);
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19 changes: 0 additions & 19 deletions hil-test/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -228,22 +228,3 @@ generic-queue = [
integrated-timers = [
"esp-hal-embassy/integrated-timers",
]

# https://doc.rust-lang.org/cargo/reference/profiles.html#test
# Test and bench profiles inherit from dev and release respectively.
[profile.dev]
codegen-units = 1
debug = 2
debug-assertions = true
incremental = false
opt-level = "z"
overflow-checks = true

[profile.release]
codegen-units = 1
debug = 2
debug-assertions = false
incremental = false
opt-level = 3
lto = "fat"
overflow-checks = false
4 changes: 2 additions & 2 deletions xtask/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -144,10 +144,10 @@ pub fn build_documentation(

let docs_path = windows_safe_path(
&workspace
.join(package.to_string())
.join("target")
.join(target)
.join("doc"),
.join("doc")
.join(package.to_string().replace('-', "_")),
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This change means we can't generate documentation for the packages excluded from the workspace. Not sure if it matters, I don't think we want to do that for the xtensa-lx packages or hil tests at this moment.

);

Ok(docs_path)
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