Consistent SPI Timing (Need review)

esp-hal-common/src/spi/master.rs

@@ -2708,23 +2708,25 @@ pub trait Instance {
     // FIXME: Using something like `core::slice::from_raw_parts` and
     // `copy_from_slice` on the receive registers works only for the esp32 and
     // esp32c3 varaints. The reason for this is unknown.
+    #[inline]
     fn read_bytes_from_fifo(&mut self, words: &mut [u8]) -> Result<(), Error> {
         let reg_block = self.register_block();
-
         for chunk in words.chunks_mut(FIFO_SIZE) {
             self.configure_datalen(chunk.len() as u32 * 8);
 
-            let mut fifo_ptr = reg_block.w0.as_ptr();
-            for index in (0..chunk.len()).step_by(4) {
-                let reg_val = unsafe { *fifo_ptr };
+            let fifo_slice =
+                unsafe { core::slice::from_raw_parts(reg_block.w0.as_ptr(), FIFO_SIZE) };
+            for (blk, index) in (0..chunk.len()).step_by(4).enumerate() {
+                let reg_val = fifo_slice[blk];
                 let bytes = reg_val.to_le_bytes();
 
-                let len = usize::min(chunk.len(), index + 4) - index;
-                chunk[index..(index + len)].clone_from_slice(&bytes[0..len]);
+                if index + 4 > chunk.len() {
+                    let len = usize::min(chunk.len(), index + 4) - index;
+                    chunk[index..(index + len)].copy_from_slice(&bytes[0..len]);
+                    break;
+                }
 
-                unsafe {
-                    fifo_ptr = fifo_ptr.offset(1);
-                };
+                chunk[index..(index + 4)].copy_from_slice(&bytes);
             }
         }