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Move all instructions to main.py
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jiegec committed Dec 13, 2023
1 parent 334cca4 commit 1172958
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Showing 15 changed files with 193 additions and 390 deletions.
3 changes: 3 additions & 0 deletions code/vfclass_d.h
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for (int i = 0;i < 2;i++) {
dst.dword[i] = fp_classify(a.fp64[i]);
}
3 changes: 3 additions & 0 deletions code/vfclass_s.h
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for (int i = 0;i < 4;i++) {
dst.word[i] = fp_classify(a.fp32[i]);
}
3 changes: 3 additions & 0 deletions code/vfmadd_d.h
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for (int i = 0;i < 2;i++) {
dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i];
}
3 changes: 3 additions & 0 deletions code/vfmadd_s.h
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for (int i = 0;i < 4;i++) {
dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i];
}
3 changes: 3 additions & 0 deletions code/vfmsub_d.h
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@@ -0,0 +1,3 @@
for (int i = 0;i < 2;i++) {
dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i];
}
3 changes: 3 additions & 0 deletions code/vfmsub_s.h
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@@ -0,0 +1,3 @@
for (int i = 0;i < 4;i++) {
dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i];
}
3 changes: 3 additions & 0 deletions code/vfnmadd_d.h
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for (int i = 0;i < 2;i++) {
dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]);
}
3 changes: 3 additions & 0 deletions code/vfnmadd_s.h
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for (int i = 0;i < 4;i++) {
dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]);
}
3 changes: 3 additions & 0 deletions code/vfnmsub_d.h
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@@ -0,0 +1,3 @@
for (int i = 0;i < 2;i++) {
dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]);
}
3 changes: 3 additions & 0 deletions code/vfnmsub_s.h
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@@ -0,0 +1,3 @@
for (int i = 0;i < 4;i++) {
dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]);
}
42 changes: 2 additions & 40 deletions docs/lsx/bitwise_operations.md
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@@ -1,46 +1,8 @@
# Bitwise Operations

## __m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)
{{ vbitsel_v() }}

### Synopsis

```c++
__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)
#include <lsxintrin.h>
Instruction: vbitsel.v vr, vr, vr
CPU Flags: LSX
```
### Description
Compute bitwise selection: for each bit position, if the bit in `c` equals to one, copy the bit from `b` to `dst`, otherwise copy from `a`.
### Operation
```c++
{% include 'vbitsel_v.h' %}
```

## __m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)

### Synopsis

```c++
__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)
#include <lsxintrin.h>
Instruction: vbitseli.b vr, vr, imm
CPU Flags: LSX
```
### Description
Compute bitwise selection: for each bit position, if the bit in `a` equals to one, copy the bit from `imm` to `dst`, otherwise copy from `b`.
### Operation
```c++
{% include 'vbitseli_b.h' %}
```
{{ vbitseli_b() }}

{{ vbitclr('b') }}
{{ vbitclr('h') }}
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130 changes: 6 additions & 124 deletions docs/lsx/float_conversion.md
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@@ -1,132 +1,14 @@
# Floating Point Conversion

## __m128d __lsx_vfcvth_d_s (__m128 a)
{{ vfcvth_d_s() }}
{{ vfcvtl_d_s() }}

### Synopsis
{{ vfcvt_s_d() }}

```c++
__m128d __lsx_vfcvth_d_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfcvth.d.s vr, vr
CPU Flags: LSX
```
{{ vfcvth_s_h() }}
{{ vfcvtl_s_h() }}

### Description
Convert single precision floating point elements in higher half of `a` to double precision.
### Operation
```c++
{% include('vfcvth_d_s.h') %}
```

## __m128d __lsx_vfcvtl_d_s (__m128 a)

### Synopsis

```c++
__m128d __lsx_vfcvtl_d_s (__m128 a)
#include <lsxintrin.h>
Instruction: vfcvtl.d.s vr, vr
CPU Flags: LSX
```
### Description
Convert single precision floating point elements in lower half of `a` to double precision.
### Operation
```c++
{% include('vfcvtl_d_s.h') %}
```


## __m128 __lsx_vfcvt_s_d (__m128d a, __m128d b)

### Synopsis

```c++
__m128 __lsx_vfcvt_s_d (__m128a, __m128d b)
#include <lsxintrin.h>
Instruction: vfcvt.s.d vr, vr, vr
CPU Flags: LSX
```
### Description
Convert double precision floating point elements in `a` and `b` to double precision.
### Operation
```c++
{% include('vfcvt_s_d.h') %}
```

## __m128 __lsx_vfcvth_s_h (__m128i a)

### Synopsis

```c++
__m128 __lsx_vfcvth_s_h (__m128i a)
#include <lsxintrin.h>
Instruction: vfcvth.s.h vr, vr
CPU Flags: LSX
```
### Description
Convert half precision floating point elements in higher half of `a` to single precision.
### Operation
```c++
{% include('vfcvth_s_h.h') %}
```

## __m128 __lsx_vfcvtl_s_h (__m128i a)

### Synopsis

```c++
__m128 __lsx_vfcvtl_s_h (__m128i a)
#include <lsxintrin.h>
Instruction: vfcvtl.s.h vr, vr
CPU Flags: LSX
```
### Description
Convert half precision floating point elements in lower half of `a` to single precision.
### Operation
```c++
{% include('vfcvtl_s_h.h') %}
```


## __m128i __lsx_vfcvt_h_s (__m128 a, __m128 b)

### Synopsis

```c++
__m128i __lsx_vfcvt_h_s (__m128, __m128 b)
#include <lsxintrin.h>
Instruction: vfcvt.h.s vr, vr, vr
CPU Flags: LSX
```
### Description
Convert single precision floating point elements in `a` and `b` to half precision.
### Operation
```c++
{% include('vfcvt_h_s.h') %}
```
{{ vfcvt_h_s() }}

{{ vffint_d_w('h') }}
{{ vffint_d_w('l') }}
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48 changes: 2 additions & 46 deletions docs/lsx/float_misc.md
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@@ -1,51 +1,7 @@
# Floatint Point Misc

## __m128i __lsx_vfclass_d (__m128d a)

### Synopsis

```c++
__m128i __lsx_vfclass_d (__m128d a)
#include <lsxintrin.h>
Instruction: vfclass.d vr, vr
CPU Flags: LSX
```
### Description
Classifiy each double precision floating point elements in `a`.
### Operation
```c++
for (int i = 0;i < 2;i++) {
dst.dword[i] = fp_classify(a.fp64[i]);
}
```

## __m128i __lsx_vfclass_s (__m128 a)

### Synopsis

```c++
__m128i __lsx_vfclass_s (__m128d a)
#include <lsxintrin.h>
Instruction: vfclass.s vr, vr
CPU Flags: LSX
```
### Description
Classifiy each single precision floating point elements in `a`.
### Operation
```c++
for (int i = 0;i < 4;i++) {
dst.word[i] = fp_classify(a.fp32[i]);
}
```

{{ vclass_d() }}
{{ vclass_s() }}

{{ vfrint('', 's') }}
{{ vfrint('', 'd') }}
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