Add vmskgez/vmsknz

README.md

@@ -60,10 +60,6 @@ TODO List:
 
 ### vfrstpi.b/h
 
-### vmskgez.b
-
-### vmsknz.b
-
 ### vseteqz.v
 
 ### vsetnez.v

code/gen_tb.py

@@ -73,6 +73,8 @@
     "vmod": (widths_all, "v128 a, v128 b"),
     "vmsub": (widths_signed, "v128 a, v128 b, v128 c"),
     "vmskltz": (widths_signed, "v128 a"),
+    "vmskgez": (["b"], "v128 a"),
+    "vmsknz": (["b"], "v128 a"),
     "vmuh": (widths_all, "v128 a, v128 b"),
     "vmul": (widths_signed, "v128 a, v128 b"),
     "vmulwev": (widths_vaddw, "v128 a, v128 b"),

code/vmskgez_b.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vmskgez_b(v128 a) {
+  v128 dst;
+#include "vmskgez_b.h"
+  return dst;
+}
+
+void test() { FUZZ1(vmskgez_b); }

code/vmskgez_b.h

@@ -0,0 +1,15 @@
+u64 m = 0x8080808080808080;
+u64 c = m & a.dword[0];
+c |= c << 7;
+c |= c << 14;
+c |= c << 28;
+c >>= 56;
+dst.dword[0] = c;
+c = m & a.dword[1];
+c |= c << 7;
+c |= c << 14;
+c |= c << 28;
+c >>= 56;
+dst.dword[0] |= c << 8;
+dst.dword[0] = (u16)~dst.dword[0];
+dst.dword[1] = 0;

code/vmsknz_b.cpp

@@ -0,0 +1,9 @@
+#include "common.h"
+
+v128 vmsknz_b(v128 a) {
+  v128 dst;
+#include "vmsknz_b.h"
+  return dst;
+}
+
+void test() { FUZZ1(vmsknz_b); }

code/vmsknz_b.h

@@ -0,0 +1,15 @@
+u64 m = 0x7F7F7F7F7F7F7F7F;
+u64 c = ~(((a.dword[0] & m) + m) | a.dword[0] | m);
+c |= c << 7;
+c |= c << 14;
+c |= c << 28;
+c >>= 56;
+dst.dword[0] = c;
+c = ~(((a.dword[1] & m) + m) | a.dword[1] | m);
+c |= c << 7;
+c |= c << 14;
+c |= c << 28;
+c >>= 56;
+dst.dword[0] |= c << 8;
+dst.dword[0] = (u16)~dst.dword[0];
+dst.dword[1] = 0;

docs/lsx/misc.md

@@ -15,11 +15,15 @@
 {{ vinsgr2vr('w') }}
 {{ vinsgr2vr('d') }}
 
+{{ vmskgez('b') }}
+
 {{ vmskltz('b') }}
 {{ vmskltz('h') }}
 {{ vmskltz('w') }}
 {{ vmskltz('d') }}
 
+{{ vmsknz('b') }}
+
 {{ vpackev('b') }}
 {{ vpackev('h') }}
 {{ vpackev('w') }}

main.py

@@ -825,4 +825,22 @@ def vmskltz(name):
             intrinsic=f"__m128i __lsx_vmskltz_{name} (__m128i a)",
             instr=f"vmskltz.{name} vr, vr",
             desc=f"For each {width}-bit element in `a`, if the element is less than zero, set one bit in `dst`, otherwise clear it.",
+        )
+
+    @env.macro
+    def vmskgez(name):
+        width = widths[name]
+        return instruction(
+            intrinsic=f"__m128i __lsx_vmskgez_{name} (__m128i a)",
+            instr=f"vmskgez.{name} vr, vr",
+            desc=f"For each {width}-bit element in `a`, if the element is greater than or equal to zero, set one bit in `dst`, otherwise clear it.",
+        )
+
+    @env.macro
+    def vmsknz(name):
+        width = widths[name]
+        return instruction(
+            intrinsic=f"__m128i __lsx_vmsknz_{name} (__m128i a)",
+            instr=f"vmsknz.{name} vr, vr",
+            desc=f"For each {width}-bit element in `a`, if the element is non-zero, set one bit in `dst`, otherwise clear it.",
         )