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Spiller: Detach legacy pass and supply analyses instead #119181

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Jan 10, 2025
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Spiller: Detach legacy pass and supply analyses instead #119181

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16 changes: 14 additions & 2 deletions llvm/include/llvm/CodeGen/Spiller.h
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Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,10 @@ class MachineFunction;
class MachineFunctionPass;
class VirtRegMap;
class VirtRegAuxInfo;
class LiveIntervals;
class LiveStacks;
class MachineDominatorTree;
class MachineBlockFrequencyInfo;

/// Spiller interface.
///
Expand All @@ -41,12 +45,20 @@ class Spiller {
virtual ArrayRef<Register> getReplacedRegs() = 0;

virtual void postOptimization() {}

struct RequiredAnalyses {
LiveIntervals &LIS;
LiveStacks &LSS;
MachineDominatorTree &MDT;
const MachineBlockFrequencyInfo &MBFI;
};
};

/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
Spiller *createInlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF,
VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
Spiller *createInlineSpiller(const Spiller::RequiredAnalyses &Analyses,
MachineFunction &MF, VirtRegMap &VRM,
VirtRegAuxInfo &VRAI);

} // end namespace llvm

Expand Down
36 changes: 14 additions & 22 deletions llvm/lib/CodeGen/InlineSpiller.cpp
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Expand Up @@ -75,7 +75,6 @@ RestrictStatepointRemat("restrict-statepoint-remat",
cl::desc("Restrict remat for statepoint operands"));

namespace {

class HoistSpillHelper : private LiveRangeEdit::Delegate {
MachineFunction &MF;
LiveIntervals &LIS;
Expand Down Expand Up @@ -128,15 +127,11 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
DenseMap<MachineBasicBlock *, unsigned> &SpillsToIns);

public:
HoistSpillHelper(MachineFunctionPass &pass, MachineFunction &mf,
VirtRegMap &vrm)
: MF(mf), LIS(pass.getAnalysis<LiveIntervalsWrapperPass>().getLIS()),
LSS(pass.getAnalysis<LiveStacksWrapperLegacy>().getLS()),
MDT(pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
HoistSpillHelper(const Spiller::RequiredAnalyses &Analyses,
MachineFunction &mf, VirtRegMap &vrm)
: MF(mf), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
TRI(*mf.getSubtarget().getRegisterInfo()),
MBFI(
pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
TRI(*mf.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
IPA(LIS, mf.getNumBlockIDs()) {}

void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
Expand Down Expand Up @@ -190,16 +185,12 @@ class InlineSpiller : public Spiller {
~InlineSpiller() override = default;

public:
InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap &VRM,
VirtRegAuxInfo &VRAI)
: MF(MF), LIS(Pass.getAnalysis<LiveIntervalsWrapperPass>().getLIS()),
LSS(Pass.getAnalysis<LiveStacksWrapperLegacy>().getLS()),
MDT(Pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
InlineSpiller(const Spiller::RequiredAnalyses &Analyses, MachineFunction &MF,
VirtRegMap &VRM, VirtRegAuxInfo &VRAI)
: MF(MF), LIS(Analyses.LIS), LSS(Analyses.LSS), MDT(Analyses.MDT),
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
TRI(*MF.getSubtarget().getRegisterInfo()),
MBFI(
Pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
TRI(*MF.getSubtarget().getRegisterInfo()), MBFI(Analyses.MBFI),
HSpiller(Analyses, MF, VRM), VRAI(VRAI) {}

void spill(LiveRangeEdit &) override;
ArrayRef<Register> getSpilledRegs() override { return RegsToSpill; }
Expand Down Expand Up @@ -237,10 +228,11 @@ Spiller::~Spiller() = default;

void Spiller::anchor() {}

Spiller *llvm::createInlineSpiller(MachineFunctionPass &Pass,
MachineFunction &MF, VirtRegMap &VRM,
VirtRegAuxInfo &VRAI) {
return new InlineSpiller(Pass, MF, VRM, VRAI);
Spiller *
llvm::createInlineSpiller(const InlineSpiller::RequiredAnalyses &Analyses,
MachineFunction &MF, VirtRegMap &VRM,
VirtRegAuxInfo &VRAI) {
return new InlineSpiller(Analyses, MF, VRM, VRAI);
}

//===----------------------------------------------------------------------===//
Expand Down
16 changes: 11 additions & 5 deletions llvm/lib/CodeGen/RegAllocBasic.cpp
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Expand Up @@ -22,6 +22,7 @@
#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/LiveStacks.h"
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h"
Expand Down Expand Up @@ -187,6 +188,7 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<ProfileSummaryInfoWrapperPass>();
AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequiredID(MachineDominatorsID);
AU.addPreservedID(MachineDominatorsID);
AU.addRequired<MachineLoopInfoWrapperPass>();
Expand Down Expand Up @@ -310,16 +312,20 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
<< "********** Function: " << mf.getName() << '\n');

MF = &mf;
auto &MBFI = getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
auto &LiveStks = getAnalysis<LiveStacksWrapperLegacy>().getLS();
auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();

RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM());
VirtRegAuxInfo VRAI(
*MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(),
&getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI());
VirtRegAuxInfo VRAI(*MF, *LIS, *VRM,
getAnalysis<MachineLoopInfoWrapperPass>().getLI(), MBFI,
&getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI());
VRAI.calculateSpillWeightsAndHints();

SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM, VRAI));
SpillerInstance.reset(
createInlineSpiller({*LIS, LiveStks, MDT, MBFI}, *MF, *VRM, VRAI));

allocatePhysRegs();
postOptimization();
Expand Down
4 changes: 3 additions & 1 deletion llvm/lib/CodeGen/RegAllocGreedy.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2750,6 +2750,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
Bundles = &getAnalysis<EdgeBundlesWrapperLegacy>().getEdgeBundles();
SpillPlacer = &getAnalysis<SpillPlacementWrapperLegacy>().getResult();
DebugVars = &getAnalysis<LiveDebugVariablesWrapperLegacy>().getLDV();
auto &LSS = getAnalysis<LiveStacksWrapperLegacy>().getLS();

initializeCSRCost();

Expand All @@ -2770,7 +2771,8 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
getAnalysis<RegAllocPriorityAdvisorAnalysis>().getAdvisor(*MF, *this);

VRAI = std::make_unique<VirtRegAuxInfo>(*MF, *LIS, *VRM, *Loops, *MBFI);
SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM, *VRAI));
SpillerInstance.reset(
createInlineSpiller({*LIS, LSS, *DomTree, *MBFI}, *MF, *VRM, *VRAI));

VRAI->calculateSpillWeightsAndHints();

Expand Down
5 changes: 4 additions & 1 deletion llvm/lib/CodeGen/RegAllocPBQP.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -794,6 +794,9 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
MachineBlockFrequencyInfo &MBFI =
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();

auto &LiveStks = getAnalysis<LiveStacksWrapperLegacy>().getLS();
auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();

VirtRegMap &VRM = getAnalysis<VirtRegMapWrapperLegacy>().getVRM();

PBQPVirtRegAuxInfo VRAI(
Expand All @@ -807,7 +810,7 @@ bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
VirtRegAuxInfo DefaultVRAI(
MF, LIS, VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(), MBFI);
std::unique_ptr<Spiller> VRegSpiller(
createInlineSpiller(*this, MF, VRM, DefaultVRAI));
createInlineSpiller({LIS, LiveStks, MDT, MBFI}, MF, VRM, DefaultVRAI));

MF.getRegInfo().freezeReservedRegs();

Expand Down
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