Merge pull request #2822 from o1-labs/o1vm/riscv32im/test-decoding-slt

o1vm/riscv32im: test decoding slt

o1vm/src/interpreters/riscv32im/tests.rs

@@ -123,6 +123,29 @@ pub fn generate_random_sll_instruction<RNG: RngCore + CryptoRng>(rng: &mut RNG)
     ]
 }
 
+pub fn generate_random_slt_instruction<RNG: RngCore + CryptoRng>(rng: &mut RNG) -> [u8; 4] {
+    let opcode = 0b0110011;
+    let rd = rng.gen_range(0..32);
+    let funct3 = 0b010;
+    let rs1 = rng.gen_range(0..32);
+    let rs2 = rng.gen_range(0..32);
+    let funct2 = 0b00;
+    let funct5 = 0b00000;
+    let instruction = opcode
+        | (rd << 7)
+        | (funct3 << 12)
+        | (rs1 << 15)
+        | (rs2 << 20)
+        | (funct2 << 25)
+        | (funct5 << 27);
+    [
+        instruction as u8,
+        (instruction >> 8) as u8,
+        (instruction >> 16) as u8,
+        (instruction >> 24) as u8,
+    ]
+}
+
 #[test]
 pub fn test_instruction_decoding_add() {
     let mut env: Env<Fp> = dummy_env();
@@ -161,3 +184,16 @@ pub fn test_instruction_decoding_sll() {
     let (opcode, _instruction) = env.decode_instruction();
     assert_eq!(opcode, Instruction::RType(RInstruction::ShiftLeftLogical));
 }
+
+#[test]
+pub fn test_instruction_decoding_slt() {
+    let mut env: Env<Fp> = dummy_env();
+    let mut rng = o1_utils::tests::make_test_rng(None);
+    let instruction = generate_random_slt_instruction(&mut rng);
+    env.memory[0].1[0] = instruction[0];
+    env.memory[0].1[1] = instruction[1];
+    env.memory[0].1[2] = instruction[2];
+    env.memory[0].1[3] = instruction[3];
+    let (opcode, _instruction) = env.decode_instruction();
+    assert_eq!(opcode, Instruction::RType(RInstruction::SetLessThan));
+}