[HW] Fix flushing upon load-related exceptions

.github/workflows/sphinx.yml

@@ -6,16 +6,16 @@ jobs:
   build:
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v3
+    - uses: actions/checkout@v4
     - name: Build HTML
       uses: ammaraskar/sphinx-action@master
     - name: Upload artifacts
-      uses: actions/upload-artifact@v3
+      uses: actions/upload-artifact@v4
       with:
         name: html-docs
         path: docs/build/html/
     - name: Deploy
-      uses: peaceiris/actions-gh-pages@v3
+      uses: peaceiris/actions-gh-pages@v4
       if: github.ref == 'refs/heads/main'
       with:
         github_token: ${{ secrets.GITHUB_TOKEN }}

CHANGELOG.md

@@ -35,6 +35,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
  - Solve type-conversion warnings about type  - Indexed loads need to wait for operand requesters ready in sequencer
  - Drop sequencer `pe_req_valid` in case of exception
  - Reworked STU exception flush engine
+ - Correctly flush the backend pipeline upon indexed load exceptions
+ - Make addrgen wait for index address before making an MMU request
+ - Fix typos in lane sequencer
 
 ### Added
 

cheshire/sw/include/rvv_test.h

@@ -24,21 +24,29 @@
 #define _VSETVLI(vl,avl)          _VSETVLI_64(vl, avl)
 #define _VLD(vreg,address_load)  __VLD(vreg,64,address_load)
 #define _VST(vreg,address_store) __VST(vreg,64,address_store)
+#define _VLD_IDX(vd,vs2,address_load)  __VLD_IDX(vd,vs2,64,address_load)
+#define _VST_IDX(vs1,vs2,address_store) __VST_IDX(vs1,vs2,64,address_store)
 #elif EEW == 32
 #define _DTYPE                   __DTYPE(32)
 #define _VSETVLI(vl,avl)          _VSETVLI_32(vl, avl)
 #define _VLD(vreg,address_load)  __VLD(vreg,32,address_load)
 #define _VST(vreg,address_store) __VST(vreg,32,address_store)
+#define _VLD_IDX(vd,vs2,address_load)  __VLD_IDX(vd,vs2,32,address_load)
+#define _VST_IDX(vs1,vs2,address_store) __VST_IDX(vs1,vs2,32,address_store)
 #elif EEW == 16
 #define _DTYPE                   __DTYPE(16)
 #define _VSETVLI(vl,avl)          _VSETVLI_16(vl, avl)
 #define _VLD(vreg,address_load)  __VLD(vreg,16,address_load)
 #define _VST(vreg,address_store) __VST(vreg,16,address_store)
+#define _VLD_IDX(vd,vs2,address_load)  __VLD_IDX(vd,vs2,16,address_load)
+#define _VST_IDX(vs1,vs2,address_store) __VST_IDX(vs1,vs2,16,address_store)
 #elif EEW == 8
 #define _DTYPE                   __DTYPE(8)
 #define _VSETVLI(vl,avl)          _VSETVLI_8(vl, avl)
 #define _VLD(vreg,address_load)  __VLD(vreg,8,address_load)
 #define _VST(vreg,address_store) __VST(vreg,8,address_store)
+#define _VLD_IDX(vd,vs2,address_load)  __VLD_IDX(vd,vs2,8,address_load)
+#define _VST_IDX(vs1,vs2,address_store) __VST_IDX(vs1,vs2,8,address_store)
 #else
 #error "ERROR: No EEW was defined. Please specify one in [8,16,32,64]."
 #endif
@@ -49,6 +57,8 @@
 #define __DTYPE(eew)                  uint##eew##_t
 #define __VLD(vreg,eew,address_load)  asm volatile ("vle"#eew".v "#vreg", (%0)"  : "+&r"(address_load));
 #define __VST(vreg,eew,address_store) asm volatile ("vse"#eew".v "#vreg", (%0)"  : "+&r"(address_store));
+#define __VLD_IDX(vd,vs2,eew,address_load)  asm volatile ("vluxei"#eew".v "#vd", (%0), "#vs2 : "+&r"(address_load));
+#define __VST_IDX(vs1,vs2,eew,address_store) asm volatile ("vsuxei"#eew".v "#vs1", (%0), "#vs2 : "+&r"(address_store));
 
 ///////////////////////
 // Reshuffle helpers //
@@ -172,11 +182,14 @@ volatile uint64_t ret_cnt;
   #define RVV_TEST_AVL(EEW) (VLMAX / (EEW))
 #endif
 
+#ifndef _ENABLE_RVV_
+#define _ENABLE_RVV_
 void enable_rvv() {
   // Enalbe RVV by seting MSTATUS.VS
   asm volatile (" li      t0, %0       " :: "i"(MSTATUS_VS));
   asm volatile (" csrs    mstatus, t0" );
 }
+#endif
 
 uint64_t reset_v_state ( uint64_t avl ) {
     uint64_t vl_local = 0;

cheshire/sw/include/vector_util.h

@@ -33,10 +33,13 @@ void stop_timer() { timer += get_cycle_count(); }
 // Get the value of the timer
 int64_t get_timer() { return timer; }
 
+#ifndef _ENABLE_RVV_
+#define _ENABLE_RVV_
 inline void enable_rvv() {
   asm volatile ("li t0, %0" :: "i"(MSTATUS_VS));
   asm volatile ("csrs mstatus, t0" );
 }
+#endif
 
 inline int similarity_check(double a, double b, double threshold) {
   double diff = a - b;