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[wip] tb_wb_dcache: Fix config pkg
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Signed-off-by: Nils Wistoff <[email protected]>
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niwis committed Nov 8, 2024
1 parent 081b340 commit 0f50765
Showing 1 changed file with 37 additions and 28 deletions.
65 changes: 37 additions & 28 deletions corev_apu/tb/tb_wb_dcache/hdl/cv64a6_config_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ package cva6_config_pkg;
localparam CVA6ConfigF16En = 0;
localparam CVA6ConfigF16AltEn = 0;
localparam CVA6ConfigF8En = 0;
localparam CVA6ConfigF8AltEn = 0;
localparam CVA6ConfigFVecEn = 0;

localparam CVA6ConfigCvxifEn = 1;
Expand Down Expand Up @@ -83,46 +84,38 @@ package cva6_config_pkg;

localparam config_pkg::cva6_user_cfg_t cva6_cfg = '{
XLEN: unsigned'(CVA6ConfigXlen),
FpgaEn: bit'(CVA6ConfigFpgaEn),
NrCommitPorts: unsigned'(CVA6ConfigNrCommitPorts),
AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth),
AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth),
AxiIdWidth: unsigned'(CVA6ConfigAxiIdWidth),
AxiUserWidth: unsigned'(CVA6ConfigDataUserWidth),
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
RVF: bit'(CVA6ConfigRVF),
RVD: bit'(CVA6ConfigRVF),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),
RVA: bit'(CVA6ConfigAExtEn),
RVB: bit'(CVA6ConfigBExtEn),
RVV: bit'(CVA6ConfigVExtEn),
RVC: bit'(CVA6ConfigCExtEn),
RVH: bit'(CVA6ConfigHExtEn),
RVZCB: bit'(CVA6ConfigZcbExtEn),
RVZCMP: bit'(CVA6ConfigZcmpExtEn),
XFVec: bit'(CVA6ConfigFVecEn),
CvxifEn: bit'(CVA6ConfigCvxifEn),
RVSCLIC: bit'(0),
RVZiCond: bit'(CVA6ConfigRVZiCond),
NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries),
RVZicntr: bit'(0),
RVZihpm: bit'(0),
RVF: bit'(CVA6ConfigRVF),
RVD: bit'(CVA6ConfigRVF),
XF16: bit'(CVA6ConfigF16En),
XF16ALT: bit'(CVA6ConfigF16AltEn),
XF8: bit'(CVA6ConfigF8En),
XF8ALT: bit'(CVA6ConfigF8AltEn),
XFVec: bit'(CVA6ConfigFVecEn),
PerfCounterEn: bit'(CVA6ConfigPerfCounterEn),
MmuPresent: bit'(CVA6ConfigMmuPresent),
RVS: bit'(1),
RVU: bit'(1),
DebugEn: bit'(1),
DmBaseAddress: 64'h0,
HaltAddress: 64'h800,
ExceptionAddress: 64'h808,
RASDepth: unsigned'(CVA6ConfigRASDepth),
BTBEntries: unsigned'(CVA6ConfigBTBEntries),
BHTEntries: unsigned'(CVA6ConfigBHTEntries),
DmBaseAddress: 64'h0,
TvalEn: bit'(CVA6ConfigTvalEn),
DirectVecOnly: bit'(0),
NrPMPEntries: unsigned'(CVA6ConfigNrPMPEntries),
PMPCfgRstVal: {64{64'h0}},
PMPAddrRstVal: {64{64'h0}},
PMPEntryReadOnly: 64'd0,
NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
NrNonIdempotentRules: unsigned'(2),
NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),
NonIdempotentLength: 1024'({64'b0, 64'b0}),
Expand All @@ -132,27 +125,43 @@ package cva6_config_pkg;
NrCachedRegionRules: unsigned'(1),
CachedRegionAddrBase: 1024'(CachedAddrBeg),
CachedRegionLength: 1024'({64'h40000000}),
MaxOutstandingStores: unsigned'(7),
DebugEn: bit'(1),
CvxifEn: bit'(CVA6ConfigCvxifEn),
NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
CLICNumInterruptSrc: unsigned'(1),
AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth),
AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth),
AxiIdWidth: unsigned'(CVA6ConfigAxiIdWidth),
AxiUserWidth: unsigned'(CVA6ConfigDataUserWidth),
AxiBurstWriteEn: bit'(0),
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
IcacheByteSize: unsigned'(CVA6ConfigIcacheByteSize),
IcacheSetAssoc: unsigned'(CVA6ConfigIcacheSetAssoc),
IcacheLineWidth: unsigned'(CVA6ConfigIcacheLineWidth),
DCacheType: CVA6ConfigDcacheType,
DcacheIdWidth: int'(CVA6ConfigDcacheIdWidth),
DcacheByteSize: unsigned'(CVA6ConfigDcacheByteSize),
DcacheSetAssoc: unsigned'(CVA6ConfigDcacheSetAssoc),
DcacheLineWidth: unsigned'(CVA6ConfigDcacheLineWidth),
DataUserEn: unsigned'(CVA6ConfigDataUserEn),
WtDcacheWbufDepth: int'(CVA6ConfigWtDcacheWbufDepth),
FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth),
FetchUserEn: unsigned'(CVA6ConfigFetchUserEn),
FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth),
FpgaEn: bit'(CVA6ConfigFpgaEn),
TechnoCut: bit'(0),
SuperscalarEn: bit'(CVA6ConfigSuperscalarEn),
NrCommitPorts: unsigned'(CVA6ConfigNrCommitPorts),
NrLoadPipeRegs: int'(CVA6ConfigNrLoadPipeRegs),
NrStorePipeRegs: int'(CVA6ConfigNrStorePipeRegs),
NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries),
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
MaxOutstandingStores: unsigned'(7),
RASDepth: unsigned'(CVA6ConfigRASDepth),
BTBEntries: unsigned'(CVA6ConfigBTBEntries),
BHTEntries: unsigned'(CVA6ConfigBHTEntries),
InstrTlbEntries: int'(16),
DataTlbEntries: int'(16),
UseSharedTlb: bit'(0),
SharedTlbDepth: int'(64),
NrLoadPipeRegs: int'(CVA6ConfigNrLoadPipeRegs),
NrStorePipeRegs: int'(CVA6ConfigNrStorePipeRegs),
DcacheIdWidth: int'(CVA6ConfigDcacheIdWidth)
SharedTlbDepth: int'(64)
};

endpackage

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