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Better propagate clear_i.
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Yvan Tortorella committed May 9, 2024
1 parent 15524ce commit ed54c87
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Showing 4 changed files with 31 additions and 21 deletions.
1 change: 1 addition & 0 deletions core/cache_subsystem/cva6_hpdcache_subsystem.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -109,6 +109,7 @@ module cva6_hpdcache_subsystem
) i_cva6_icache (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (1'b0),
.flush_i (icache_flush_i),
.en_i (icache_en_i),
.miss_o (icache_miss_o),
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44 changes: 23 additions & 21 deletions core/cache_subsystem/wt_axi_adapter.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@ module wt_axi_adapter
) (
input logic clk_i,
input logic rst_ni,
input logic clear_i,

// icache
input logic icache_data_req_i,
Expand Down Expand Up @@ -119,7 +120,7 @@ module wt_axi_adapter
) i_rr_arb_tree (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i('0),
.flush_i(clear_i),
.rr_i ('0),
.req_i (arb_req),
.gnt_o (arb_ack),
Expand Down Expand Up @@ -312,7 +313,7 @@ module wt_axi_adapter
) i_icache_data_fifo (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (icache_data_full),
.empty_o (icache_data_empty),
Expand All @@ -329,7 +330,7 @@ module wt_axi_adapter
) i_dcache_data_fifo (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (dcache_data_full),
.empty_o (dcache_data_empty),
Expand All @@ -353,7 +354,7 @@ module wt_axi_adapter
) i_rd_icache_id (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (icache_rd_full),
.empty_o (icache_rd_empty),
Expand All @@ -370,7 +371,7 @@ module wt_axi_adapter
) i_rd_dcache_id (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (dcache_rd_full),
.empty_o (dcache_rd_empty),
Expand All @@ -387,7 +388,7 @@ module wt_axi_adapter
) i_wr_dcache_id (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (dcache_wr_full),
.empty_o (dcache_wr_empty),
Expand Down Expand Up @@ -417,7 +418,7 @@ module wt_axi_adapter
) i_b_fifo (
.clk_i (clk_i),
.rst_ni (rst_ni),
.flush_i (1'b0),
.flush_i (clear_i),
.testmode_i(1'b0),
.full_o (b_full),
.empty_o (b_empty),
Expand Down Expand Up @@ -620,20 +621,20 @@ module wt_axi_adapter
// assign dcache_rtrn_o.inv.vld = '0;
// assign dcache_rtrn_o.inv.all = '0;

`FFARNC(icache_first_q , icache_first_d , 1'b0, 1'b1 , clk_i, rst_ni)
`FFARNC(dcache_first_q , dcache_first_d , 1'b0, 1'b1 , clk_i, rst_ni)
`FFARNC(icache_rd_shift_q , icache_rd_shift_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(icache_rd_shift_user_q , icache_rd_shift_user_d, 1'b0, '0 , clk_i, rst_ni)
`FFARNC(dcache_rd_shift_q , dcache_rd_shift_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(dcache_rd_shift_user_q , dcache_rd_shift_user_d, 1'b0, '0 , clk_i, rst_ni)
`FFARNC(icache_rtrn_vld_q , icache_rtrn_vld_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_vld_q , dcache_rtrn_vld_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(icache_rtrn_tid_q , icache_rtrn_tid_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_tid_q , dcache_rtrn_tid_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_type_q , dcache_rtrn_type_d , 1'b0, wt_cache_pkg::DCACHE_LOAD_ACK, clk_i, rst_ni)
`FFARNC(dcache_rtrn_inv_q , dcache_rtrn_inv_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(amo_off_q , amo_off_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(amo_gen_r_q , amo_gen_r_d , 1'b0, '0 , clk_i, rst_ni)
`FFARNC(icache_first_q , icache_first_d , clear_i, 1'b1 , clk_i, rst_ni)
`FFARNC(dcache_first_q , dcache_first_d , clear_i, 1'b1 , clk_i, rst_ni)
`FFARNC(icache_rd_shift_q , icache_rd_shift_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(icache_rd_shift_user_q , icache_rd_shift_user_d, clear_i, '0 , clk_i, rst_ni)
`FFARNC(dcache_rd_shift_q , dcache_rd_shift_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(dcache_rd_shift_user_q , dcache_rd_shift_user_d, clear_i, '0 , clk_i, rst_ni)
`FFARNC(icache_rtrn_vld_q , icache_rtrn_vld_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_vld_q , dcache_rtrn_vld_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(icache_rtrn_tid_q , icache_rtrn_tid_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_tid_q , dcache_rtrn_tid_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(dcache_rtrn_type_q , dcache_rtrn_type_d , clear_i, wt_cache_pkg::DCACHE_LOAD_ACK, clk_i, rst_ni)
`FFARNC(dcache_rtrn_inv_q , dcache_rtrn_inv_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(amo_off_q , amo_off_d , clear_i, '0 , clk_i, rst_ni)
`FFARNC(amo_gen_r_q , amo_gen_r_d , clear_i, '0 , clk_i, rst_ni)


///////////////////////////////////////////////////////
Expand All @@ -648,6 +649,7 @@ module wt_axi_adapter
) i_axi_shim (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (clear_i),
.rd_req_i (axi_rd_req),
.rd_gnt_o (axi_rd_gnt),
.rd_addr_i (axi_rd_addr),
Expand Down
4 changes: 4 additions & 0 deletions core/mmu_sv32/cva6_mmu_sv32.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -122,6 +122,7 @@ module cva6_mmu_sv32
) i_itlb (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (clear_i),
.flush_i(flush_tlb_i),

.update_i(update_itlb),
Expand All @@ -144,6 +145,7 @@ module cva6_mmu_sv32
) i_dtlb (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i(clear_i),
.flush_i(flush_tlb_i),

.update_i(update_dtlb),
Expand All @@ -167,6 +169,7 @@ module cva6_mmu_sv32
) i_shared_tlb (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i(clear_i),
.flush_i(flush_tlb_i),

.enable_translation_i (enable_translation_i),
Expand Down Expand Up @@ -206,6 +209,7 @@ module cva6_mmu_sv32
) i_ptw (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i(clear_i),
.flush_i(flush_i),

.ptw_active_o (ptw_active),
Expand Down
3 changes: 3 additions & 0 deletions core/mmu_sv39/mmu.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -106,6 +106,7 @@ module mmu
) i_itlb (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (clear_i),
.flush_i(flush_tlb_i),

.update_i(update_ptw_itlb),
Expand All @@ -129,6 +130,7 @@ module mmu
) i_dtlb (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (clear_i)
.flush_i(flush_tlb_i),

.update_i(update_ptw_dtlb),
Expand All @@ -152,6 +154,7 @@ module mmu
) i_ptw (
.clk_i (clk_i),
.rst_ni (rst_ni),
.clear_i (clear_i),
.ptw_active_o (ptw_active),
.walking_instr_o (walking_instr),
.ptw_error_o (ptw_error),
Expand Down

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