Skip to content

Commit

Permalink
All protocols have read meta channel in DB
Browse files Browse the repository at this point in the history
  • Loading branch information
@TheMightyDuckOfDoom
TheMightyDuckOfDoom committed Aug 25, 2023
1 parent 4395d0f commit 47b9b1a
Show file tree
Hide file tree
Showing 5 changed files with 34 additions and 64 deletions.
5 changes: 5 additions & 0 deletions src/backend/database/idma_axi_lite.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,11 @@ bridge_template: |
.mst_req_o ( axi_lite_axi_${port}_req ),
.mst_resp_i ( axi_lite_axi_${port}_rsp )
);
legalizer_read_meta_channel: |
r_req_o.ar_req.axi_lite.ar_chan = '{
addr: { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} },
prot: opt_tf_q.src_axi_opt.prot
};
read_template: |
idma_axi_lite_read #(
.StrbWidth ( StrbWidth ),
Expand Down
2 changes: 2 additions & 0 deletions src/backend/database/idma_axi_stream.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,8 @@ write_bridge_template: |
.axi_req_o ( axi_stream_axi_write_req ),
.axi_rsp_i ( axi_stream_axi_write_rsp )
);
legalizer_read_meta_channel: |
r_req_o.ar_req = '0;
read_template: |
idma_axi_stream_read #(
.StrbWidth ( StrbWidth ),
Expand Down
4 changes: 4 additions & 0 deletions src/backend/database/idma_init.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,10 @@ read_bridge_template: |
assign init_read_rsp.rsp_chan.init_value = {StrbWidth{8'h42}};
assign init_axi_read_req = '0;
legalizer_read_meta_channel: |
r_req_o.ar_req.init.req_chan = '{
cfg: r_tf_q.base_addr
};
read_template: |
idma_init_read #(
.StrbWidth ( StrbWidth ),
Expand Down
14 changes: 14 additions & 0 deletions src/backend/database/idma_tilelink.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,20 @@ bridge_template: |
.axi_req_o ( tilelink_axi_${port}_req ),
.axi_rsp_i ( tilelink_axi_${port}_rsp )
);
legalizer_read_meta_channel: |
r_req_o.ar_req.tilelink.a_chan.size = '0;
for (int i = 0; i <= PageAddrWidth; i++) begin
if ((1 << i) == r_num_bytes) begin
r_req_o.ar_req.tilelink.a_chan.size = i;
end
end
r_req_o.ar_req.tilelink.a_chan.opcode = 3'd4;
r_req_o.ar_req.tilelink.a_chan.param = 3'd0;
r_req_o.ar_req.tilelink.a_chan.source = opt_tf_q.axi_id;
r_req_o.ar_req.tilelink.a_chan.address = { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} };
r_req_o.ar_req.tilelink.a_chan.mask = '1;
r_req_o.ar_req.tilelink.a_chan.data = '0;
r_req_o.ar_req.tilelink.a_chan.corrupt = 1'b0;
read_template: |
idma_tilelink_read #(
.BurstLength ( ${database['tilelink']['page_size']} ),
Expand Down
73 changes: 9 additions & 64 deletions src/backend/src/idma_legalizer.sv.tpl
View file
Original file line number Diff line number Diff line change
Expand Up @@ -577,86 +577,31 @@ w_tf_q.length[PageAddrWidth:0] ),
// Connect outputs
//--------------------------------------
% if one_read_port:
% if 'axi' in used_read_protocols:
always_comb begin
${database[used_read_protocols[0]]['legalizer_read_meta_channel']}
end
% elif 'axi_lite' in used_read_protocols:
assign r_req_o.ar_req.axi_lite.ar_chan = '{
addr: { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} },
prot: opt_tf_q.src_axi_opt.prot
};
% elif 'obi' in used_read_protocols:
always_comb begin
${database[used_read_protocols[0]]['legalizer_read_meta_channel']}
end
% elif 'tilelink' in used_read_protocols:
always_comb begin
r_req_o.ar_req.tilelink.a_chan.size = '0;
for (int i = 0; i <= PageAddrWidth; i++) begin
if ((1 << i) == r_num_bytes) begin
r_req_o.ar_req.tilelink.a_chan.size = i;
end
end
r_req_o.ar_req.tilelink.a_chan.opcode = 3'd4;
r_req_o.ar_req.tilelink.a_chan.param = 3'd0;
r_req_o.ar_req.tilelink.a_chan.source = opt_tf_q.axi_id;
r_req_o.ar_req.tilelink.a_chan.address = { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} };
r_req_o.ar_req.tilelink.a_chan.mask = '1;
r_req_o.ar_req.tilelink.a_chan.data = '0;
r_req_o.ar_req.tilelink.a_chan.corrupt = 1'b0;
end
% elif 'init' in used_read_protocols:
assign r_req_o.ar_req.init.req_chan = '{
cfg: r_tf_q.base_addr
};
% elif 'axi_stream' in used_read_protocols:
assign r_req_o.ar_req = '0;
% else:
`IDMA_NONSYNTH_BLOCK(
initial begin
$fatal(1, "One Read Port not implemented for ${used_read_protocols[0]}");
end
)
% endif
% else:
always_comb begin : gen_read_meta_channel
r_req_o.ar_req = '0;
case(opt_tf_q.src_protocol)
% if 'axi' in used_read_protocols:
idma_pkg::AXI:
${database['axi']['legalizer_read_meta_channel']}
% endif
% if 'axi_lite' in used_read_protocols:
idma_pkg::AXI_LITE:
r_req_o.ar_req.axi_lite.ar_chan = '{
addr: { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} },
prot: opt_tf_q.src_axi_opt.prot
};
% endif
% if 'obi' in used_read_protocols:
idma_pkg::OBI:
${database['obi']['legalizer_read_meta_channel']}
% endif
% if 'tilelink' in used_read_protocols:
idma_pkg::TILELINK:
% for protocol in used_read_protocols:
idma_pkg::${database[protocol]['protocol_enum']}:
% if protocol == 'tilelink':
r_req_o.ar_req.tilelink.a_chan = '{
opcode: 3'd4,
param: 3'd0,
size: OffsetWidth,
size: OffsetWidth, // Why is this different than one_read_port version?
source: opt_tf_q.axi_id,
address: { r_tf_q.addr[AddrWidth-1:OffsetWidth], {{OffsetWidth}{1'b0}} },
mask: '1,
data: '0,
corrupt: 1'b0
};
% endif
% if 'init' in used_read_protocols:
idma_pkg::INIT:
r_req_o.ar_req.init.req_chan = '{\
cfg: r_tf_q.base_addr
};
% endif

% else:
${database[protocol]['legalizer_read_meta_channel']}
% endif
% endfor
default:
r_req_o.ar_req = '0;
endcase
Expand Down

0 comments on commit 47b9b1a

Please sign in to comment.