doc: Minor fixes and update deploy script

.github/workflows/docs.yml

@@ -60,8 +60,7 @@ jobs:
         run: make idma_doc_all
       -
         name: Create publish docs
-        if: ${{ github.event_name == 'push' }}
-        uses: actions/upload-pages-artifact@main
+        uses: actions/[email protected]
         with:
           path: target/doc/html
 
@@ -79,4 +78,4 @@ jobs:
       -
         name: Deploy to Github Pages
         id: deployment
-        uses: actions/deploy-pages@v1
+        uses: actions/deploy-pages@v3

doc/src/conf.py

@@ -25,7 +25,7 @@
 # -- Project information -----------------------------------------------------
 
 project = u'iDMA Specification'
-copyright = u'2021 PULP-platform'
+copyright = u'2024 PULP-platform'
 author = u'PULP-platform'
 
 # The short X.Y version

doc/src/index.rst

@@ -49,16 +49,11 @@ The morty docs provide the generated description of the SystemVerilog files with
 
   `RW_AXI Backend <idma_backend_synth_rw_axi/index.html>`_
 
-  `ND Backend <idma_nd_backend_synth/index.html>`_
-
 .. image:: ../fig/graph/idma_backend_synth_r_axi_w_obi.png
   :width: 600
 
 .. image:: ../fig/graph/idma_backend_synth_r_obi_w_axi.png
   :width: 600
 
 .. image:: ../fig/graph/idma_backend_synth_rw_axi.png
-  :width: 600
-
-.. image:: ../fig/graph/idma_nd_backend_synth.png
-  :width: 600
+  :width: 600