Data Generation #2038

Job	Run time
check-control-registers	24s
riscv-isa-sim	6s
tc-gcc	24s
tc-llvm	49s
verilator	7s
check-opcodes	4s
verilator-model (minpool)	11s
verilator-model (mempool)	13s
check-bootrom	9s
build-apps-gcc (minpool)	1m 5s
build-apps-gcc (mempool)	1m 17s
unit-test	2m 0s
tc-halide	12s
build-apps-llvm (minpool)	1m 3s
build-apps-llvm (mempool)	1m 8s
build-apps-halide (minpool)	35s
build-apps-halide (mempool)	39s
run-apps-gcc	0s
run-apps-halide (minpool)	44s
run-apps-halide (mempool)	3m 10s
run-apps-llvm	0s
clean-up-compile-runs (minpool)	4s
clean-up	4s
clean-up-compile-runs (mempool)	2s
	14m 30s

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