Fixup run.py

run.py

@@ -6,6 +6,7 @@
 from pathlib import Path
 
 
+
 # Do PYTHONPATH insert() instead of append() to prefer any local repo checkout over any pip install
 REPO_ROOT = Path(__file__).parent.resolve()
 TSFPGA_PATH = REPO_ROOT / "tsfpga"
@@ -16,6 +17,7 @@
 sys.path.insert(0, str(HDL_REGISTERS_PATH))
 
 from tsfpga.examples.simulation_utils import create_vhdl_ls_configuration
+from tsfpga.examples.example_env import get_hdl_modules
 
 OUTPUT_PATH = REPO_ROOT / "out"
 
@@ -36,14 +38,14 @@ def main():
     args = cli.parse_args()
 
     modules = get_modules(modules_folder=REPO_ROOT / "modules")
-    modules += get_modules(modules_folder=REPO_ROOT / "hdl-modules" / "modules")
+    modules_no_sim = get_modules(modules_folder= REPO_ROOT / "hdl-modules" / "modules")
 
     simulation_project = SimulationProject(args=args, enable_preprocessing=True)
-    simulation_project.add_modules(args=args, modules=modules)
+    simulation_project.add_modules(args=args, modules=modules, modules_no_sim=modules_no_sim)
 
     if not args.vivado_skip:
         simulation_project.add_vivado_simlib()
-
+        
     create_vhdl_ls_configuration(
         output_path=REPO_ROOT,
         temp_files_path=REPO_ROOT / "out",